RISCV Infra System IP DV - Staff Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm is looking for a RISCV Infra System IP DV Staff Engineer in Bangalore, India. This role is responsible for IP/Sub System design verification, developing test plans, and collaborating with cross-functional teams to ensure design closure and debug regressions.
Responsibilities
- Develop test plan and test cases to cover design feature set
- Follow up with stake holders on code coverage, functional coverage closure at different levels of test bench
- Work closely with System Architects, Design, emulation teams on failure debugs, code/functional coverage closure
- Debug of regression signatures and identifying bug fixes
- Plan, design, optimize, verify, and test electronic systems
Requirements
- 3 to 15 years of solid experience in IP/Sub System design verification
- Expertise on UVM, System Verilog DV test bench and other associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage)
- Understanding of bus protocols like CHI/AHB/AXI/ACE/ACE-Lite and Interconnect concepts
- Knowledgeable on ARM / RISCV system architecture, Memory Management, Virtual Memory concepts, Core sight architecture, power management fundamentals
- Understanding of multi-core ARMv8/v9 CPU architecture, coherency protocols and virtualization
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience OR Master's degree and 3+ years OR PhD and 2+ years of experience
Desired Qualifications
- Post-Silicon bring-up and HW-SW debug experience would be a plus
- Proficiency in Gen AI skills, Scripting languages (Python or Perl) for Automation initiatives is desirable
Benefits
- Leading technology innovator
- Enables next-generation experiences
- Drives digital transformation to create a smarter, connected future for all
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