R&D Engineering, Engineer
Construction, Engineering & Trades · Civil & Industrial Engineering · Electrical Engineering
In short
Synopsys is seeking an early-career R&D Engineer in Noida, India, to develop and maintain software for chip design, verification, and manufacturing. This role involves hands-on circuit design and optimization, simulation, and scripting, contributing to next-generation memory IP for AI, mobile, and automotive applications.
Responsibilities
- Design and optimize SRAM bitcells and peripheral circuits (sense amplifiers, write drivers, precharge circuits, row/column decoders) for power, performance, area, and yield.
- Run transistor-level simulations using SPICE-class tools to validate circuit behavior across process, voltage, and temperature corners.
- Perform Monte Carlo and variability analysis to ensure robust operation across manufacturing spread and aging effects.
- Contribute to SRAM compiler development and automation flows using scripting languages like Python, Perl, or Tcl.
- Debug circuit failures, analyze noise margins, and implement read/write assist techniques to improve reliability.
- Collaborate with layout, verification, and characterization teams to meet timing, power, and area targets.
- Document design decisions, simulation results, and circuit methodologies for team knowledge sharing and design reuse.
Requirements
- B.Tech or M.Tech in Electrical Engineering, Electronics Engineering, VLSI Design, Microelectronics, or a related field.
- 0-2 years of experience in circuit design, VLSI engineering, or memory design (internships, projects, and relevant coursework included).
- Demonstrated eagerness to learn new technologies, methodologies, and design techniques.
- Strong foundation in CMOS device physics, transistor operation, and semiconductor process technology.
- Understanding of SRAM architecture, bitcell design, and memory circuit fundamentals (even if from coursework or internship projects).
Desired Qualifications
- Familiarity with scripting languages like Python, Perl, or Tcl is a plus.
- Experience with SRAM compiler development is a strong plus.
- Experience with advanced node design challenges is a strong plus.
- Published work in memory design is a strong plus.
- Analytical thinker with strong reasoning and problem-solving abilities.
- Effective communicator, both orally and in writing.
- Adaptable and eager to learn new technologies.
- Collaborative team player who values diversity and inclusion.
- Self-motivated, proactive, and customer-focused.
- Detail-oriented with a commitment to delivering high-quality results.
Benefits
- Comprehensive medical and healthcare plans for you and your family.
- Generous Time Away programs (ETO and FTO).
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
- Employee Stock Purchase Plan (ESPP) with a 15% discount and 24-month look-back.
- Retirement plans (vary by region and country).
- Competitive salaries.
- Opportunities to work on cutting-edge memory IP solutions.
- Collaboration with global teams.
- Contribution to memory architectures powering AI accelerators, mobile processors, automotive SoCs, and networking silicon.
#R&D#Engineering#Chip Design#EDA#Software Development#AI/ML#GenAI#Cloud
Company
Synopsys Inc
Job Posted
2 days ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Entry
Locations
Noida, India
Qualification
Bachelor, Master
Applicants
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