LPASS Design Verification Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Qualcomm is hiring a LPASS Design Verification Engineer in Bangalore, India to join their Audio solutions team. The role involves DV ownership of Low Power Audio Subsystem (LPASS) core features, developing robust testbenches, and exploring innovative DV methodologies to ensure bug-free silicon for Snapdragon devices.
Responsibilities
- DV ownership of one or more features in the Low power audio subsystem (LPASS) core.
- Developing a robust testbench, optimized for the specific feature/DUT.
- Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches and process improvements.
- Ensure a bug free silicon for Tape Out which eventually leads to a superb user experience of Snapdragon based computing devices.
Requirements
- Minimum 1 - 2 years of VLSI industry experience.
- Strong debugging and analytical skills.
- Strong knowledge of HDLs like Verilog, System Verilog.
- Proficiency in developing SV/UVM based test benches.
- Proficient in debugging RTL/TB issues using Verdi or similar tools.
- Proficient with scripting languages such as Perl and(or) Python.
Desired Qualifications
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
- Knowledge of UPF, low power architecture.
Benefits
- Qualcomm is an equal opportunity employer.
- Qualcomm is committed to providing an accessible process for individuals with disabilities.
- Qualcomm is committed to making our workplace accessible for individuals with disabilities.
#LPASS#Design Verification#Hardware Engineering#VLSI
Company
Qualcomm
Job Posted
2 days ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Associate
Locations
Bangalore, India
Qualification
Bachelor
Applicants
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