EVA Design Verification Engineer, Senior - Cork, Ireland
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
QT Technologies Ireland Limited is seeking a Senior EVA Design Verification Engineer in Cork, Ireland, to work on complex multimedia IP Cores for video CODEC standards and computer vision applications. Responsibilities include architecting and implementing testbenches in System Verilog/UVM, collaborating with cross-functional teams, and ensuring the functionality and performance of computer vision IPs.
Responsibilities
- Applies knowledge and experience to architect, design, implement, the testbench to verify the structure and performance computer vision IPs
- Creates and maintains verification test benches and environments in System Verilog/UVM
- Collaborates with Architecture, Software, Firmware, Design, Modeling, Emulation and Post-silicon validation teams to define and develop test methodology and content
- Participate in micro-architecture reviews
- Collect, organize and execute various forms of system level test content including directed testcases, standards compliance test suites, and system level scenarios
- Build automation for continue integration and testing based on latest IP
- Works with team members to understand and align on narrow scope of feature development and meet targets.
- Write technical documentation and feature descriptions for straightforward projects under the direction of a supervisor.
- Scripting and automation skills (Python, Make, etc)
- Formal verification experience is a plus
Requirements
- Minimum 3 years of DV experience using uvm/assertion based verification technologies
- Experience in verifying complex SOC or SOC subsystems
- Experience with caches and DDR memory protocol verification
- Exposure to firmware/driver development using C++
- Exposure to successful tapeouts from conception to post silicon debug
- Experience with Power aware simulations.
- Experience with perf and power verification.
- Experience with Gate level Simulations
Desired Qualifications
- Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
- Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
- PhD in Science, Engineering, or related field.
Benefits
- Salary, stock and performance related bonus
- Maternity/Paternity Leave
- Employee stock purchase scheme
- Matching pension scheme
- Education Assistance
- Relocation and immigration support (if needed)
- Life, Medical, Income and Travel Insurance
- Subsidised memberships for physical and mental well-being
- Bicycle purchase scheme
- Employee run clubs, including, running, football, chess, badminton + many more
Skills
System VerilogUVMPythonC++
#Verification Engineer#ASIC#SoC#Video CODEC#Computer Vision#System Verilog#UVM#Python
About Qualcomm
Enabling a world where everyone and everything can be intelligently connected.
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
6 days ago
Employment Type
Full Time
Work mode
On Site
Experience Level
Senior
Locations
Cork, Ireland
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant
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