Emulation Performance/Debug Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · QA & Testing · Embedded Systems

In short

Qualcomm is looking for an Emulation Performance/Debug Engineer to join their central SoC digital hardware organization. The role involves working with emulation platforms, tools, and system debug, focusing on SoC functionality like CPU/DSP cores, multimedia, and bus protocols.

Responsibilities

Design, develop, and deploy uniform global methodologies for emulation build generation and debug across FPGA based emulation platforms.
Collaborate with architects, designers, verification engineers, software engineers, and customers.
Bring-up new FPGA emulation/prototyping hardware and software.
Debug low-level software and hardware issues.
Validate and debug digital circuits.
Work with CPU and SoC architectures, including interconnects, power management, PMIC, NoC, and peripherals.

Requirements

Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR PhD in Science, Engineering, or related field.
5+ years of experience working in emulation and silicon environments.
Expertise in Verilog / SystemVerilog.
Experience with C programming.
Proficient in Python, TCL.
Experience with Xilinx/Intel FPGAs, Tools, and timing closure techniques.
Experience with Emulation Platforms (FPGA Prototyping, Veloce, Palladium).
Experience with Emulation tools (Synthesis, Place and Route, Constraints, Clocking, Timing Closure).
Experience with System Debug (Waveform generation and Content Debug support).
Knowledge of SoC Functionality (CPU/DSP Core, Multimedia, IO, Peripherals, DDR, Modem, Bus Protocols).
Experience with debug tools including JTAG and kernel debuggers.

Desired Qualifications

Cross-site collaboration, vendor engagements, and executive communication.
Pre-silicon prototyping for new SoC designs, including pre-silicon enablement and bring-up.
Solid understanding of SoC building blocks (interconnects, power management, PMIC, NoC, peripherals).
Basic understanding of power and performance.

Benefits

Competitive annual discretionary bonus program.
Opportunity for annual RSU grants.
Highly competitive benefits package designed to support your success at work, at home, and at play.

Skills

FPGAVelocePalladiumSynthesisPlace and RouteConstraintsClockingTiming ClosureCPUDSPDDRModemBus ProtocolsJTAGKernel DebuggersVerilogSystemVerilogC programmingPythonTCLXilinx FPGAsIntel FPGAs

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