DSP/NSP Power Analysis & Correlation

Technology, Data & Digital · IT Infrastructure & Security · Systems Engineering · Software Engineering

In short

We are seeking a highly motivated Senior Engineer with 5-6 years of experience to drive pre-silicon power analysis, optimization, and silicon correlation for next-generation DSP and NSP architectures. This role involves evaluating power estimation tools, identifying optimization opportunities, and correlating silicon measurements with pre-silicon estimates.

Responsibilities

Evaluate and compare pre-silicon power analysis and estimation tools.
Analyze tool methodologies and recommend enhancements.
Drive adoption of best-in-class capabilities for power optimization.
Perform workload-level and block-level power analysis for DSP/NSP subsystems.
Identify power hotspots and optimization opportunities across architecture, RTL, and software layers.
Measure and characterize performance and power behavior on silicon platforms.
Correlate silicon measurements with pre-silicon estimates and investigate mismatches.
Develop methodologies and automation to improve power prediction accuracy and correlation efficiency.
Analyze packet flows, data movement, memory traffic, and workload behavior.
Collaborate with architecture, design, software, performance, and silicon validation teams.
Generate technical reports and present findings to stakeholders.

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
5-6 years of experience in power analysis, performance characterization, silicon validation, architecture analysis, or related areas.
Strong understanding of processor and SoC architecture fundamentals.
Experience with pre-silicon environments (simulation, emulation, performance models, power models).
Experience with silicon performance and power characterization.
Understanding of performance-per-watt tradeoffs and power optimization techniques.
Familiarity with scripting and automation using Python, Shell, Perl, or similar languages.
Strong analytical, debugging, and problem-solving skills.
Excellent communication and cross-functional collaboration abilities.

Desired Qualifications

Experience with DSP, AI/ML accelerators, vector processors, or heterogeneous compute architectures.
Knowledge of power modeling, power estimation methodologies, activity-based analysis, and PMU-based profiling.
Understanding of packet/data flow analysis, memory hierarchy, bandwidth utilization, and workload characterization.
Experience correlating simulation, emulation, or modeling results against silicon measurements.
Experience working with large-scale performance and power datasets and visualization tools.