Digital Design Verification Engineering Internship (16-Month Co-op)

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Join Synopsys as a Digital Design Verification Engineering Intern for a 16-month co-op in Mississauga, Ontario. You will verify next-generation SERDES products using SystemVerilog and UVM, gaining hands-on experience with protocols like Ethernet, PCIe, and USB. This role is ideal for a Bachelor's student with previous internship experience in a related engineering field.

Responsibilities

  • Define and track Verification Testplans to ensure comprehensive coverage of design functionality.
  • Design and write constrained-random SystemVerilog testbenches using UVM and directed testbenches for ATE/Customer applications.
  • Create and examine Functional Coverage and write SystemVerilog assertions to validate design behavior.
  • Debug RTL and gate-level simulation failures, perform Code Coverage Analysis and Closure, and track bugs using tools such as Jira.
  • Leverage AI to enhance verification tasks and workflows.
  • Collaborate with design engineers in Portugal and verification teams in Cairo.

Requirements

  • Currently pursuing a Bachelor's degree in Computer Engineering, Electrical Engineering, or a related discipline.
  • Previous co-op or internship experience.
  • Strong interest in digital design and verification, supported by relevant coursework.
  • Proficiency in scripting languages like Perl or Python.
  • Comprehensive knowledge of Verilog and/or SystemVerilog language.
  • Basic proficiency with Unix/Linux shell environments.
  • Confident communication and initiative.
  • Independent and resourceful.

Benefits

  • Real-world projects
  • Hands-on experience
  • Opportunities to collaborate with passionate teams globally
  • Explore your interests, share your ideas, and bring them to life
  • Shape your career path within an inclusive culture that fosters innovation and collaboration
  • Work with cutting-edge technology
  • Position yourself as an entry-level engineer by the end of your internship
#Digital Design#Verification Engineering#Internship#Co-op#Mississauga#Ontario#Canada#Synopsys#Ethernet#PCIe#SATA#USB#MIPI#SERDES#SystemVerilog#UVM#Perl#Python#Verilog#Unix/Linux#Jira
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Company

Synopsys Inc

Job Posted

2 weeks ago

Employment Type

Internship

WorkMode

Hybrid

Experience Level

Entry

Locations

Mississauga, Canada

Qualification

Bachelor

Applicants

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