The Job

Design Verification Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

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In short

Microsoft is seeking a Design Verification Engineer to join the Compute Silicon & Manufacturing Engineering team within the SCHIE organization. This role involves pre-silicon verification and post-silicon validation of custom silicon components, contributing to Microsoft's cloud infrastructure. The engineer will write stimulus, develop VIP, implement coverage, and collaborate with cross-functional teams.

Responsibilities

  • Establish yourself as an integral member of a pre-silicon verification and post-silicon validation team for the development of custom silicon components.
  • Work with a team to write constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness.
  • Develop Verification IP (VIP) components to verify home grown designs.
  • Develop Universal Verification Methodology (UVM) components to interface between test code and verification simulation environments.
  • Define and implement functional coverage and drive coverage closure.
  • Collaborate with Architecture, Design, Firmware/Software, Product Engineering, Program Management and third-party vendor teams to ensure pre-and-post-Si testing is comprehensive.
  • Develop scripts for verification and validation infrastructure.

Requirements

  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 2+ years technical engineering experience OR equivalent experience.
  • Ability to meet Microsoft, customer and/or government security screening requirements.
  • Microsoft Cloud Background Check required.
  • Eligibility to access export-controlled information required.

Desired Qualifications

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
  • 3+ years of pre-silicon System on Chip (SOC), chip level, subsystem or IP verification experience.
  • 3+ years of experience with verification principles, object-oriented programming, test plan development, testbench creation, stimulus generation, UVM/Open Verification Methodology (OVM), and coverage-based verification.
  • 3+ years of experience in SystemVerilog, C/C++, and scripting languages such as Python, Ruby or Perl.
  • Demonstrated experience on one or more of the following: Coherency, Caches, Fabrics, Double Data Rate (DDR) controllers, Peripheral Component Interconnect Express (PCIe), Compute Express Link (CXL), Advanced eXtensible Interface(AXI)/Coherent Hub Interface(CHI) protocol bridges or other complex IP/blocks or subsystems.
  • Experience with a full product cycle from definition to silicon, including writing IP/block or subsystem level test plans, developing tests, debugging failures and coverage signoff.
  • Experience creating, maintaining, or integrating test benches, checkers and stimulus using System Verilog Test Bench (SVTB), Universal Verification Methodology (UVM), Formal Verification and/or C/C++.
  • Experience in automating verification processes using Python or another scripting language.

Benefits

  • Access to information controlled for export.
  • The typical base pay range for this role across the U.S. is USD $102,100 - $202,200 per year.
  • The base pay range for this role in the San Francisco Bay area and New York City metropolitan area is USD $133,800 - $219,200 per year.
  • Certain roles may be eligible for benefits and other compensation.
#Silicon Engineering#Hardware Engineering#Verification
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Company

Microsoft

Job Posted

1 month ago

Employment Type

Full Time

WorkMode

Hybrid

Experience Level

Mid-Senior

Locations

United States

Qualification

Master, Bachelor, Doctoral

Applicants

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