ASIC Physical Design, Staff Engineer - 18156
Technology, Data & Digital · Software & Web Development · Embedded Systems · Software Engineering
In short
Responsibilities
- Own the full RTL-to-GDSII physical implementation flow for memory test-chip blocks and top-level designs, driving synthesis, floorplanning, power planning, placement, CTS, routing, and sign-off closure.
- Develop and maintain Back-End implementation and sign-off flows including PnR, STA, PV, IR/EM analysis, and extraction methodologies.
- Review and implement foundry sign-off requirements and tape-out checklists, ensuring manufacturing compliance and first-pass silicon success.
- Execute timing analysis and closure across multiple PVT corners, optimizing for power, performance, and area.
- Drive physical and electrical verification using Synopsys IC Validator, resolving DRC, LVS, ERC, antenna, EM, IR-drop, and signal integrity issues.
- Collaborate with Foundry, CAD, Front-End, DFT, STA, and Design teams to resolve implementation challenges and hit project milestones.
- Build automation frameworks and scripts in Python, Tcl, and Perl that improve design productivity and flow efficiency.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline.
- 5+ years of hands-on ASIC physical design experience with proven silicon tape-outs, ideally on advanced process nodes.
- Deep expertise across the full RTL-to-GDSII implementation flow including synthesis, floorplanning, power planning, placement, CTS, routing, and sign-off.
- Strong proficiency with Synopsys tools including Fusion Compiler or ICC2, PrimeTime, StarRC, and IC Validator.
- Solid scripting and automation skills in Tcl, Python, and Perl with a track record of building flows that improve team efficiency.
- Experience setting up and maintaining Back-End design and sign-off methodologies including PnR, STA, PV, extraction, and IR/EM analysis.
- Ability to interpret and implement foundry sign-off requirements and tape-out checklists to ensure manufacturing readiness.
Desired Qualifications
- You can look at a floorplan and immediately see the congestion, power, or timing problems that will surface later, and you address them before they become crises.
- When a sign-off violation appears, you dig into the data, trace it to root cause, and fix it in a way that makes sense for the design and the flow.
- You write scripts and build flows with the next engineer in mind, clear variable names, comments that explain why, and structure that someone else can extend.
- You communicate clearly across disciplines, translating technical issues for front-end designers or CAD engineers without losing the thread.
- You stay calm under pressure, especially in the final weeks before tape-out, and you help the team stay focused on what actually matters.
Benefits
- Comprehensive medical and healthcare plans that work for you and your family.
- In addition to company holidays, we have ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
- Save for your future with our retirement plans that vary by region and country.
- Competitive salaries.
Skills
Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…
Company
Synopsys IncJob Posted
1 month ago
Employment Type
Full Time
Work mode
On Site
Experience Level
Senior
Locations
Hyderabad, India
Qualification
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