ASIC Digital Design/Verification, Sr Staff

Technology, Data & Digital · Software & Web Development · Software Engineering · QA & Testing

In short

Synopsys seeks a Sr Staff ASIC Digital Design/Verification Engineer in Tokyo to design and verify HBM controller IP for advanced SoC applications. This role involves RTL design, micro-architecture, testbench development using SystemVerilog/UVM, and leading verification strategies. The position requires extensive experience with semiconductor design flows and protocols, strong English communication skills, and a Master's or Bachelor's degree with significant relevant experience.

Responsibilities

  • Designing and implementing RTL-based HBM controller IP cores for cutting-edge SoC applications.
  • Interpreting and translating standard and product functional specifications into detailed micro-architectures.
  • Making architectural and methodological judgments for both design and verification activities.
  • Developing comprehensive verification strategies, including testbench architectures using SystemVerilog and UVM.
  • Creating and maintaining verification plans, item lists, coverage metrics, and checker definitions to ensure thorough validation.
  • Coordinating and leading design review meetings to ensure alignment and technical excellence across global teams.
  • Providing technical leadership and mentoring to junior engineers, setting quality standards and driving innovation.
  • Documenting progress, generating reports with “visible” verification metrics, and ensuring project milestones are met.

Requirements

  • Extensive hands-on experience with RTL design and micro-architecture development from functional specifications.
  • Proficiency in verification methodologies (UVM/VMM/OVM), SystemVerilog, and object-oriented verification techniques.
  • Deep understanding of SoC/ASIC design flows, verification planning, and coverage-driven verification.
  • Experience with simulation tools, Unix operating environments, and scripting languages (Perl, Python, TCL).
  • Solid knowledge of protocols such as DDR, PCIE, AMBA (AXI/CHI), SD/eMMC, Ethernet, USB, and MIPI.
  • Strong English communication skills and the ability to document and present technical concepts effectively.
  • BSEE with 9~10+ years or MSEE with 7~12+ years of relevant experience.

Desired Qualifications

  • Advantageous: Experience with formal verification, firmware/embedded software, C/C++, and functional safety standards (ISO26262, FMEDA).

Benefits

  • Comprehensive medical and healthcare plans that work for you and your family.
  • ETO and FTO Programs.
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
  • Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
  • Save for your future with our retirement plans that vary by region and country.
  • Competitive salaries.
#ASIC#Digital Design#Verification#Sr Staff#Tokyo#Japan#Engineering#Semiconductor#HBM#IP Core
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Company

Synopsys Inc

Job Posted

3 days ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Tokyo, Japan

Qualification

Bachelor

Applicants

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