The Job

AI System Architect (NPU / GPU / Interconnect)

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

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In short

Qualcomm is looking for an experienced AI System Architect with deep expertise in AI accelerators (NPU), GPUs, and high-performance system interconnects to shape future AI and data center compute platforms. The role involves customer engagement, defining architecture, and driving trade-off analysis across various domains including AI/NPU, GPU/Graphics, and System Interconnects.

Responsibilities

  • Engage with customers, partners, and internal stakeholders to understand AI workload requirements, deployment scenarios, performance targets, and system constraints.
  • Translate customer and market requirements into scalable system architecture, technology roadmaps, and platform features.
  • Drive architecture tradeoff analysis across performance, power, cost, scalability, and deployment requirements to influence product direction.
  • Analyze and optimize AI workloads including LLMs, Transformers, computer vision, multimodal AI, and recommendation systems.
  • Drive HW/SW co-design across architecture, compiler, runtime, driver, and framework layers.
  • Lead performance analysis and optimization across compute, memory, and communication subsystems.
  • Architect high-performance data movement across compute, memory, storage, and networking subsystems.
  • Define scale-up and scale-out architectures using PCIe, CXL, Ethernet, UALink, or similar communication fabrics.
  • Drive architecture of cache-coherent fabrics, memory hierarchies, chiplet communication, and distributed AI systems.
  • Lead system-level architecture decisions for scalability, performance-per-watt, latency, and overall system efficiency.

Requirements

  • BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • 10+ years of experience in AI accelerator, GPU, high-performance compute, system architecture, or related disciplines.
  • Deep expertise in one or more of the following areas: AI accelerator / NPU architecture, GPU architecture, graphics pipeline, and compute architecture, High-performance interconnects and communication fabrics, Data center system architecture, Memory hierarchy and bandwidth optimization, AI workload performance analysis and modeling.
  • Strong HW/SW co-design background with a solid understanding of how AI software stacks, compilers, runtimes, and drivers utilize underlying hardware resources.
  • Demonstrated ability to drive architecture decisions across hardware, software, memory, and communication subsystems.
  • Fluent in both Mandarin Chinese and English.
  • Able to lead technical discussions and collaborate effectively across global engineering teams.

Desired Qualifications

  • Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience OR Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience OR PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
#AI#NPU#GPU#Interconnects#System Architecture#Data Center#ASIC Engineering
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Company

Qualcomm

Job Posted

2 weeks ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Shanghai, China

Qualification

Bachelor, Master, Doctoral

Applicants

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