Sr Staff ASIC Verification Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · QA & Testing
In short
Synopsys is seeking a Sr Staff ASIC Verification Engineer in Bengaluru, India. This role requires extensive experience in IP verification, ownership of complex blocks, and leading technical execution using methodologies like UVM and SystemVerilog. The engineer will apply AI-assisted techniques and mentor junior team members to ensure high-quality IP releases.
Responsibilities
- Own verification for a major IP block, subsystem, or cross-IP methodology from architecture definition through final signoff and customer delivery
- Define verification strategy, planning, architecture, and signoff criteria for complex IP projects including Ethernet, USB, and similar industry-standard protocols
- Lead technical execution across verification teams by setting objectives, tracking milestones, managing risk, and driving coverage and quality closure
- Apply AI-assisted verification techniques to intelligent debug, regression analytics, test generation, and coverage closure to measurably reduce cycle time and improve defect detection
- Build and drive reusable verification infrastructure, UVM environments, and methodology improvements that scale across multiple IP domains and projects
- Mentor verification engineers on test planning, debug strategies, coverage analysis, and verification best practices while fostering technical growth across the team
- Collaborate with design, architecture, firmware, and quality teams to align verification deliverables with project goals and ensure high-quality IP releases
Requirements
- BS or BE in Electrical or Electronics Engineering with 8+ years of IP or SoC verification experience, or MS with 6+ years
- Demonstrated ownership of verification for complex IP blocks, subsystems, or cross-project methodologies with a track record of delivering measurable quality and coverage results
- Proven ability to lead verification teams and projects through technical influence, expertise, and collaboration rather than formal management authority
- Deep hands-on expertise in UVM, VMM, or OVM methodologies applied to real verification environments at unit and system levels
- Strong proficiency in SystemVerilog, industry-standard simulators like VCS, and associated debug tools used in complex IP verification workflows
- Practical experience applying AI-assisted methods to debug, regression optimization, test generation, or verification closure activities
- Experience with DesignWare IP or similar synthesizable IP verification, and familiarity with protocols such as Ethernet, USB, or PCI Express is a strong plus
Desired Qualifications
- You lead through expertise and influence, not authority, and engineers follow your technical direction because they trust your judgment and your ability to solve hard problems
- You own complex verification areas end to end, from defining strategy and architecture through executing the plan, managing risks, and driving signoff without needing constant oversight
- You can explain a verification bottleneck, a coverage gap, or a project risk to a design lead or program manager in two sentences without losing the technical nuance that matters
- You combine strategic thinking with attention to detail, knowing when to zoom out to assess methodology and when to dive into a waveform to find the root cause
- You mentor engineers by sharing not just what to do but how to think about verification problems, coverage strategies, and trade-offs in a way that builds their capability over time
- You adapt quickly in evolving project environments, shifting priorities, and ambiguous requirements, and you help the team stay focused on what actually moves the needle toward delivery
Benefits
- Comprehensive medical and healthcare plans
- ETO and FTO Programs
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
- Retirement plans that vary by region and country
- Competitive salaries
#Engineering#Semiconductor Solutions#Chip Architecture#Circuit Design#Verification#IP Verification#SoC Verification#UVM#VMM#OVM#SystemVerilog#VCS#AI-assisted Verification#DesignWare IP#Ethernet#USB#PCI Express
Company
Synopsys Inc
Job Posted
1 hour ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Bengaluru, India
Qualification
Bachelor, Master
Applicants
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