SoC Principal Physical Design Engineer
Construction, Engineering & Trades · Civil & Industrial Engineering · Electrical Engineering · Manufacturing Engineering
In short
Responsibilities
- Lead full-chip and block-level physical implementation from RTL through GDSII tapeout on advanced-node designs at 5nm, 3nm, and below
- Define and execute floorplanning, power planning, placement, clock tree synthesis, routing, and signoff strategies that hit PPA targets
- Drive timing closure, power optimization, congestion reduction, and area improvement using Fusion Compiler, PrimeTime, and StarRC
- Perform and review static timing analysis, ECO implementation, IR-drop analysis, electromigration checks, and physical verification using IC Validator
- Work directly with semiconductor customers to enable their success, troubleshoot design challenges, and deliver technical workshops and methodology guidance
- Develop automation scripts and flows using Python, Tcl, and shell scripting to improve design productivity and methodology efficiency
- Leverage AI and ML-based physical design technologies including DSO.ai and Fusion Compiler optimizations to accelerate closure and explore the design space
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
- 10 to 15+ years of hands-on ASIC or SoC physical design experience with a proven track record of multiple successful tapeouts at advanced process nodes
- Deep expertise in floorplanning, power planning, place and route, clock tree synthesis, timing closure, and physical verification including DRC and LVS
- Strong working knowledge of IR-drop analysis, electromigration analysis, and ECO methodologies for late-stage design fixes
- Proficiency in scripting languages including Python, Tcl, Perl, or shell for automation and flow development
Desired Qualifications
- Experience with Synopsys tools such as Fusion Compiler, PrimeTime, IC Validator, StarRC, Formality, and PrimePower is a strong plus
- Familiarity with foundry technologies from TSMC, Samsung, or Intel and an understanding of what changes at 5nm and below is highly valued
Benefits
- Comprehensive range of health, wellness, and financial benefits
- Competitive total rewards package including base salary, annual bonus, equity, and other discretionary bonuses
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back (ESPP)
- Retirement Plans
Skills
About Synopsys Inc
Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…
Company
Synopsys IncJob Posted
1 hour ago
Employment Type
Full Time
Work mode
On Site
Salary
US$171,200–256,800 · Negotiable
Experience Level
Executive
Locations
Austin, United States
Dallas, United States
Phoenix, United States
Mountain View, United States
Qualification
Applicants
Be an early applicant
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