Silicon Networking Lead, Google Cloud

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Als Silicon Networking Lead für Google Cloud in Bengaluru leiten Sie die Organisation und sind für die Definition, Implementierung und Bereitstellung von Networking IPs verantwortlich. Sie führen multidisziplinäre Teams durch den gesamten ASIC-Entwicklungszyklus, von der Architektur bis zum Tape-out, und arbeiten eng mit globalen Teams zusammen, um innovative Siliziumlösungen zu entwickeln, die die Zukunft der Google-Produkte prägen.

Responsibilities

Own the Silicon Networking organization in Bengaluru, including definition, implementation and deployment of Networking IPs.
Define IP development methodologies and drive deep technical involvement across the IP's development cycle, including seamless integration to SoC.
Lead project planning from architecture and micro-architecture decisions to scoping effort, collaborating across teams to represent project status.
Lead and manage a multi-disciplinary team of chip engineers, plan tasks, allocate people, and hold technical design/code reviews.
Guide and participate across the entire ASIC lifecycle, spanning architecture definition, RTL development, synthesis, timing/power, FPGA/silicon bring-up, and verification strategy.
Drive the full development life-cycle of chips from initial definition to a high-quality tape-out.
Ensure developed IPs contribute effectively across multiple key projects.
Collaborate closely with cross-functional teams and other sites around the globe.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
15 years of experience in ASIC design and development.
Experience leading multi-disciplinary silicon engineering teams through the full development life-cycle from architecture definition to tape-out.
Experience in high-performance or low-power design techniques, ASIC standard interfaces, and memory system architectures.

Desired Qualifications

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with ASIC standard interfaces and memory system architecture.
Knowledge of high-performance and low power design techniques.
Knowledge of FPGA, emulation platforms, and SOC architecture.
Knowledge of one of the following areas: arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.

Benefits

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants.
GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement.
They have no impact on statutory payments.
Current or past grants do not confer an acquired right.
English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Skills

ASIC designASIC standard interfacesmemory system architectureFPGASOC architectureRTL developmentsynthesistimingpower

#Silicon#Networking#Lead#Google Cloud#ASIC design#Engineering#RTL#SoC

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