Senior Technical Architect

Technology, Data & Digital · Software & Web Development · Software Engineering · Artificial Intelligence · Embedded Systems

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In short

As a Senior Technical Architect, you will own the on-device AI execution stack for ARM-based SoCs, focusing on model conversion, quantization, runtime integration, and deployment for vision, LLM, and VLM workloads within power and memory constraints. This role involves deploying and optimizing neural network models on various backends, managing the model conversion pipeline, and resolving technical challenges.

Responsibilities

Deploy and optimize neural network models on NPU, GPU and CPU backends using embedded inference runtimes (LiteRT/TensorFlow Lite, ONNX Runtime, ExecuTorch or vendor SDKs).
Own the model conversion pipeline — graph capture, operator mapping, quantization (PTQ and QAT support), calibration and accuracy validation against reference.
Diagnose and resolve unsupported operators, graph partitioning and fallback behaviour; work with vendor toolchains on accelerator limitations.
Enable on-device LLM and VLM workloads — weight quantization, KV-cache management, prefill/decode optimization, memory footprint and token-throughput tuning.
Benchmark and optimize inference latency, throughput, memory bandwidth and energy per inference; publish reproducible performance data.
Integrate inference into real-time media and robotics pipelines with zero-copy tensor/buffer sharing.
Build model deployment and regression tooling so accuracy and performance are tracked across releases.
Advise product and data-science teams on model architecture choices suitable for edge accelerators.

Requirements

8–10 years in software engineering, with 3+ years in on-device / edge AI deployment.
Strong C++ and Python.
Hands-on with embedded inference runtimes — LiteRT/TFLite, ONNX Runtime, ExecuTorch, TVM or vendor NPU SDKs — including delegate/execution-provider integration.
Practical quantization expertise — INT8/INT4, per-channel schemes, calibration, accuracy recovery.
Model formats and conversion tooling across PyTorch/TensorFlow to deployable graphs.
Profiling on heterogeneous SoCs and reasoning about memory bandwidth as the dominant constraint.
Understanding of CNN, transformer and modern vision/language model architectures.

Desired Qualifications

On-device LLM/VLM deployment — llama.cpp class runtimes, speculative decoding, paged KV cache.
Custom operator or kernel development for DSP/NPU/GPU (OpenCL, Vulkan compute, DSP intrinsics).
Compiler-level work — MLIR, TVM, graph-level optimization passes.
Vision pipeline integration and camera-to-inference zero-copy paths.
MLOps for edge — model versioning, A/B evaluation, field accuracy monitoring.

Benefits

Consolidated revenues as of 12 months ending September 2026 totaled $14.8 billion.

Skills

C++PythonTensorFlow LiteONNX RuntimeExecuTorchTVMMLIRPyTorchTensorFlowOpenCLVulkan

#on-device AI#AI#ARM#SoCs#neural accelerators#model conversion#quantization#runtime#deployment#vision#LLM#VLM#edge computing#NPU#GPU#CPU#embedded inference#inference latency#inference throughput#real-time media#robotics#MLOps

About HCLTech

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HCLTech is a global technology company, home to 219,000+ people across 54 countries, delivering industry-leading capabilities centered around digital, engineering and cloud, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending September 2022 totaled $12.1 billion. To learn how we can supercharge progress for…

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