Senior Manager, Design Verification
Technology, Data & Digital · Software & Web Development · Software Engineering · QA & Testing
In short
Synopsys seeks an experienced engineering leader for a Senior Manager, Design Verification role in Bengaluru, India. The role involves managing a team focused on IP verification for DesignWare IP cores, guiding employee development, and leading verification processes for various IP domains. Candidates require a BS/BE with 15+ years or MS with 12+ years of experience in IP core or SOC verification, with expertise in methodologies like UVM, VMM, or OVM and tools like VCS.
Responsibilities
- Managing a talented team of individual contributors specializing in IP Verification for DesignWare IP cores.
- Planning, establishing, and tracking team goals and objectives to ensure alignment with business targets and project requirements.
- Guiding employee development, career growth, and performance management, fostering a culture of continuous learning and improvement.
- Leading execution of verification processes, projects, and tactical initiatives across a variety of IP domains, including USB, PCI Express, Ethernet, and AMBA.
- Mentoring and supporting engineers in both technical and professional growth, leveraging your expertise to drive innovation and high standards.
- Overseeing the implementation and optimization of state-of-the-art verification environments, ensuring adherence to quality metrics and regression management standards.
- Coordinating verification tasks and collaborating across teams to deliver best-in-class IP solutions.
Requirements
- BS/BE in Electrical Engineering with 15+ years of relevant experience or MS with 12+ years in IP core or SOC verification.
- Demonstrated experience managing and leading verification engineering teams, preferably with prior leadership or management roles.
- Expertise in verification methodologies such as UVM, VMM, or OVM.
- Advanced hands-on knowledge of test planning, test environment development (unit and system level), and debugging.
- Proficiency in HVL coding for verification and familiarity with industry-standard simulators like VCS, as well as relevant debugging tools.
- Strong skills in functional coverage coding, analysis, test case creation, and regression management.
- Proven track record in achieving quality targets for complex IP verification projects.
- Excellent communication, leadership, and organizational skills.
Desired Qualifications
- Experience with DesignWare IP or similar synthesisable IP verification projects.
- Familiarity with industry standard buses and protocols (USB, PCI Express, Ethernet, AMBA).
Benefits
- Comprehensive medical and healthcare plans.
- ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
- ESPP - Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
- Retirement plans that vary by region and country.
- Competitive salaries.
#design#verification#engineering#hardware#semiconductor
Company
Synopsys Inc
Job Posted
1 month ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Bengaluru, India
Qualification
Bachelor, Master
Applicants
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