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R&D Engineering Scientist

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Synopsys is looking for an experienced R&D Engineering Scientist in Sunnyvale, California to architect high-speed serial links, focusing on PHY and SerDes technologies like 112 Gb/s and 224 Gb/s PAM4. This full-time role involves defining architectures, leading calibration strategies, and collaborating across multiple engineering teams to ensure silicon success.

Responsibilities

  • Own the PHY architecture, including protocols, data rates, BER, and PPA targets.
  • Define data-path and clocking architectures, including modulation, equalization, FEC placement, ADC-DSP, PLL, and CDR.
  • Lead calibration and adaptation strategies across process, voltage, temperature, and channel conditions.
  • Allocate power, area, performance, and latency across analog, digital, and package components.
  • Develop block specifications that engineering teams can implement and verify.
  • Close the end-to-end link budget across the transmitter, package, channel, and receiver.
  • Define architecture sign-off, modeling, observability, and silicon bring-up requirements, including loopback, PRBS, eye scan, and calibration access.
  • Align standards, signal and power integrity, package, and program teams on guaranteed IP performance.

Requirements

  • Strong architectural knowledge of 112 Gb/s and 224 Gb/s PAM4 serial links.
  • Expertise in link budgeting, insertion and return loss, crosstalk, jitter, BER, channel operating margin, and FEC coding gain.
  • Deep knowledge of CTLE, FFE, DFE, ADC-DSP, PLL, CDR, adaptation, and calibration.
  • Experience with channel and behavioral modeling, process-corner analysis, and analog, digital, and package PPA tradeoffs.
  • Silicon bring-up and debug experience using PRBS, loopback, eye scan, and calibration capabilities.
  • Demonstrated ability to write clear technical specifications and explain architecture decisions to technical, program, and customer audiences.

Desired Qualifications

  • A systems thinker who connects circuit-level decisions to end-to-end link performance.
  • A collaborative technical leader who works effectively across disciplines and geographies.
  • A clear communicator who translates complex tradeoffs into actionable decisions.
  • A pragmatic problem solver focused on quality, performance, and silicon success.

Benefits

  • Competitive salaries.
  • Annual bonus, equity, and other discretionary bonuses may be eligible.
  • Comprehensive health, wellness, and financial benefits.
  • Medical and healthcare plans.
  • ETO and FTO Programs.
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
  • ESPP to purchase Synopsys common stock at a 15% discount.
  • Retirement Plans.

Skills

AIMLGenAICloudPHYSerDesPAM4CTLEFFEDFEADC-DSPPLLCDRFECPRBS
#Engineering#R&D#PHY#SerDes#High-speed serial links#PAM4#Link budgeting#Silicon design
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About Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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Company

Synopsys Inc

Job Posted

2 days ago

Employment Type

Full Time

Work mode

On Site

Salary

US$244,000–366,000 / year

Experience Level

Mid-Senior

Locations

Sunnyvale, United States

Applicants

Be an early applicant