Principal SoC Circuit Architect

Construction, Engineering & Trades · Civil & Industrial Engineering · Electrical Engineering

In short

Microsoft is seeking a Principal SoC Circuit Architect to define and deliver operational measures for hardware manufacturing within the AI SoC Development team. This role involves defining high-speed IO PHYs, overseeing signal and power integrity, and managing clocking solutions for Microsoft's cloud infrastructure.

Responsibilities

Define SoC level high-speed IO PHYs (Ethernet, HBM4/4E/5, D2D).
Participate in and supervise Signal and Power Integrity.
Define and quality control end-to-end Power delivery solutions.
Define SoC level REFCLK and digital clocking, methodology, and simulations.
Partner with package and System design teams on SoC technology definitions.
Participate in SoC level Memory definition with the custom memory development team.

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree AND 6+ years technical engineering experience OR Bachelor's Degree AND 8+ years technical engineering experience OR equivalent experience.
Ability to meet Microsoft, customer and/or government security screening requirements.
Must pass Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Must be able to access export-controlled information and undergo citizenship verification via valid passport or other acceptable documents.

Desired Qualifications

15+ years of experience in Soc level Circuit architecture and design with MSEE or 12+ years of experience with PhD in Electrical Engineering.
Experience in PLL and Clocking solutions of AI SoCs.
Experience in High Speed IO PHY design and Signal Integrity.
Familiarity with Package/substrate design issues on signals and Power delivery.
Familiarity with PCB design, especially related to power delivery of AI SoCs.

Benefits

The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year.
In specific locations like the San Francisco Bay area and New York City metropolitan area, the base pay range is USD $188,000 - $304,200 per year.
Certain roles may be eligible for benefits and other compensation.

Skills

EthernetHBMSignal IntegrityPower IntegrityPLL

#Hardware Engineering#Silicon Engineering#SoC#AI#Cloud#Infrastructure#Circuit Design#IO PHY#Power Delivery#Clocking

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