Power Integrity Senior/Staff Engineer - 18116

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Synopsys seeks a Senior/Staff Power Integrity Engineer for its Ho Chi Minh City team. This role involves leading end-to-end power integrity analysis for UCIe PHY and high-speed I/O systems, optimizing power delivery networks, and collaborating with cross-functional teams to ensure reliable power to multi-gigabit interfaces in advanced chiplet-based systems. Requires a Master's or Ph.D. in Electrical Engineering with 5+ years of experience and proficiency in PI tools and modeling.

Responsibilities

  • Lead end-to-end power integrity analysis across die, package, and PCB for UCIe PHY and high-speed I/O systems, from VRM to on-die power grid
  • Develop and optimize Power Delivery Network architecture, performing DC IR drop, AC impedance, transient response, and resonant analysis
  • Build and validate electrical models for silicon, package substrates, PCBs, decoupling capacitors, and voltage regulators using S-parameters, IBIS, and SPICE
  • Define target impedance requirements and analyze simultaneous switching noise, ground bounce, and power-induced jitter
  • Collaborate with package, PCB, signal integrity, and PHY teams to optimize decoupling strategies and power distribution topologies
  • Support silicon bring-up by correlating lab measurements with simulation results and refining models for future designs

Requirements

  • Master's or Ph.D. in Electrical Engineering with 5+ years of hands-on experience in Power Integrity or high-speed interface design
  • Deep understanding of Power Delivery Network design, including DC IR drop, AC impedance, transient analysis, and resonance mitigation
  • Proven experience with die-package-board co-design for high-speed interfaces such as UCIe, PCIe, DDR, SerDes, or HBM
  • Proficiency with PI tools such as Cadence Sigrity, Ansys SIwave, Ansys HFSS, Ansys RedHawk-SC, Keysight ADS, or PowerSI
  • Strong working knowledge of S-parameters, IBIS/IBIS-AMI modeling, SPICE simulation, and frequency-domain analysis
  • Scripting experience in Python, Tcl, or MATLAB for automation and data analysis

Desired Qualifications

  • Ability to translate between PHY designers and package engineers without losing technical accuracy
  • Tendency to dig into model assumptions when simulation results do not match intuition
  • Methodical approach to problems with the ability to pivot quickly
  • Organizational skills for managing multiple concurrent analyses
  • Ability to correlate lab data with simulation to improve future models

Benefits

  • Comprehensive medical and healthcare plans
  • ETO and FTO Programs
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
  • ESPP (Purchase Synopsys common stock at a 15% discount, with a 24 month look-back)
  • Retirement plans
  • Competitive salaries
#engineering#semiconductor#power integrity#chiplet#UCIe#high-speed I/O#PHY#simulation#design
Synopsys Inc Logo

Company

Synopsys Inc

Job Posted

17 hours ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Ho Chi Minh City, Vietnam

Qualification

Master, Doctoral

Applicants

Be an early applicant