NPU STA/Timing Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Qualcomm seeks an NPU STA/Timing Engineer in Bangalore, India, to design, optimize, and verify electronic systems. Responsibilities include STA setup, timing analysis, and automation scripting, requiring expertise in various engineering tools and languages.

Responsibilities

STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs.
Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus.
Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.
Evaluate multiple timing methodologies/tools on different designs and technology nodes.
Work on automation scripts within STA/PD tools for methodology development.
Good Technical writing and Communication skills, should be willing to work in cross-collaborative environment.
Experience in design automation using TCL/Perl/Python.
Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus.
Familiar with process technology enablement: Circuit simulations using Hspice/FineSim, Monte Carlo.

Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
5 - 10 years of experience in STA/Timing
Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling
Hands-on experience with STA tools - Prime-time, Tempus
Have experience in driving timing convergence at Chip-level and Hard-Macro level
In-depth knowledge cross-talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling
Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus)
Knowledge of Spice simulation Hspice/FineSim, Monte Carlo.
Silicon to spice model correlation.
Proficient is scripting languages – TCL, Perl, Awk
Basic knowledge of device physics

Desired Qualifications

B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI.

Benefits

Qualcomm is an equal opportunity employer.
Qualcomm is committed to providing an accessible process.
Qualcomm is committed to making our workplace accessible for individuals with disabilities.