NOC DV Sr Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems · QA & Testing
In short
Qualcomm is seeking a Hardware Engineer for the NOC DV Sr Engineer position in Bangalore, India. The role involves verification of next-generation Infrastructure IPs for System-on-chip (SoC), including planning and implementing IP/Cluster/Formal verification flows. Responsibilities include ownership of DV test benches, developing test plans, debugging regressions, and collaborating with cross-functional teams.
Responsibilities
- Ownership of DV test bench and other associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage)
- Develop test plan and test cases to cover design feature set, follow up with stake holders on code coverage, functional coverage closure at different levels of test bench
- Work closely with System Architects, Design, emulation teams on failure debugs, code/functional coverage closure
- Debug of regression signatures and identifying bug fixes
- Responsible for Quality sign off and required documentation
- Developing/Deploying scripts/tools for validation (Certitude, VC Formal, VPlan)
- Debug and root cause post silicon issues in collaboration with Design, SW and test teams
- Work with SoC level performance modeling team on latency, bandwidth analysis
- Plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems
Requirements
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
- Experience Verification Architect/ Engineer, responsible for Verification of next generation Infrastructure IPs (DDRSS, Memory Controllers etc.) which goes into System-on-chip (SoC)
- Plan and implement IP/Cluster/Formal verification flows for the Infra IPs.
- Coordinate with different Design and SOC teams throughout the IP development cycle.
- Strong debugging, Analytical and problem-solving skills
- Expertise on UVM based verification
- Knowledgeable about ARM bus protocols, Virtual Memory concepts, SoC system architecture
- Experience in developing Monitors, Scoreboards, Sequencers that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved
- Communication and collaboration skills to work with a large world-wide design organization
- Bachelor/Master’s Degree in Electronics & Communication / Micro Electronics
- 3+ Years of Experience in IP verification or related
- Experience with UVM and ARM Bus protocols
Desired Qualifications
- Experience in designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse
- Experience in verifying designs meeting Automotive Safety Integrity Levels (ASIL)
- Proficiency in Scripting languages (Python or Perl) for Automation initiatives, C/C++/SystemC for performance models
- Post-si bring-up and HW-SW debug experience would be a plus.
- Knowledge & exposure to silicon debug tool chains would be an added advantage.
Benefits
- Qualcomm is an equal opportunity employer.
- Qualcomm is committed to providing an accessible process.
- Qualcomm is committed to making our workplace accessible for individuals with disabilities.
Skills
System VerilogUVMPythonPerlC++SystemCFPGADSPARM
#Hardware Engineering#SoC#IP Verification#DV test bench#UVM#ARM bus protocols#System Verilog#ASIL#Python#Perl#C++#SystemC
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
1 day ago
Employment Type
Full Time
Work mode
On Site
Experience Level
Senior
Locations
Bangalore, India
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant
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