NOC Design Verification Sr Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Qualcomm is seeking a Senior Engineer for NOC Design Verification in Bangalore, India, focusing on next-generation Infrastructure IPs for System-on-Chips (SoCs). The role involves planning and implementing verification flows, debugging, and ensuring quality sign-off for IP development cycles.
Responsibilities
- Ownership of DV test bench and associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage)
- Develop test plan and test cases to cover design feature set.
- Follow up with stakeholders on code coverage, functional coverage closure at different levels of test bench.
- Work closely with System Architects, Design, emulation teams on failure debugs, code/functional coverage closure.
- Debug of regression signatures and identifying bug fixes.
- Responsible for Quality sign off and required documentation.
- Developing/Deploying scripts/tools for validation (Certitude, VC Formal, VPlan).
- Debug and root cause post silicon issues in collaboration with Design, SW and test teams.
- Work with SoC level performance modeling team on latency, bandwidth analysis.
Requirements
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
- Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- Strong debugging, Analytical and problem-solving skills.
- Expertise on UVM based verification.
- Knowledgeable about ARM bus protocols, Virtual Memory concepts, SoC system architecture.
- Experience in developing Monitors, Scoreboards, Sequencers that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved.
- Communication and collaboration skills to work with a large world-wide design organization.
- 8 Years of Experience in IP verification or related.
- Experience with UVM and ARM Bus protocols.
Desired Qualifications
- Experience in designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse.
- Experience in verifying designs meeting Automotive Safety Integrity Levels (ASIL).
- Proficiency in Scripting languages (Python or Perl) for Automation initiatives, C/C++/SystemC for performance models.
- Post-si bring-up and HW-SW debug experience would be a plus.
- Knowledge & exposure to silicon debug tool chains would be an added advantage.
Benefits
- Qualcomm is an equal opportunity employer.
- Qualcomm is committed to providing an accessible process.
- Qualcomm is also committed to making our workplace accessible for individuals with disabilities.
#NOC#Design Verification#Sr Engineer#Hardware Engineering#SoC#IP verification#UVM#ARM Bus Protocols