Next Gen, High-Speed, Memory and Cache Controller Design Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Qualcomm is seeking a Senior ASIC Design Engineer to design high-speed memory and cache controllers, including HBM/LPDDR/DDR interfaces. Responsibilities include RTL coding, architecture, verification, and ensuring high-speed performance for advanced Qualcomm products.
Responsibilities
- Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development.
- Develop or contribute to the development of architecture and design specifications.
- Drive the micro-architecture of portions of the logic design.
- Implement and deliver RTL.
- Work with verification engineers to deliver high quality designs.
- Debug designs and provide debug support when integrated into the rest of the chip.
- Perform Synthesis, Timing Closure, Physical Design Support, Gate Level Simulations, and Power Analysis.
- Contribute to the overall improvement in design methodology to drive productivity and quality of results.
Requirements
- Bachelor's degree in Science, Engineering, or related field.
- Experience with LPDDR memory and cache controller, NoC based architectures especially the front end interfacing to the CPU, DSP, and multimedia processors.
- Exposure to HBM memory type designs.
- On-chip tightly coupled SRAM & L3 cache controller architecture/design.
- Experience with x86 or ARM CPU/bus architectures.
- Understanding of ordering of memory transactions and methods to enforce proper ordering in order to conform to ISA architecture specification.
Desired Qualifications
- Master's degree in Science, Engineering, or related field.
- 3+ years of experience (welcome applications from recent graduates as well).
Benefits
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants.
- Highly competitive benefits package designed to support your success at work, at home, and at play.
- Access to a link for more details about US benefits.
Skills
ASICRTL codingHBM memoryLPDDRDDRSRAMARMCPUDSPGPUNoC
#ASIC#Memory Controller#Cache Controller#HBM#LPDDR#DDR#RTL#Digital Design#Analog Design#SoC#IP Development#San Diego#California#Qualcomm
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
2 weeks ago
Employment Type
Full Time
Work mode
On Site
Salary
US$101,400–152,200 / year
Experience Level
Senior
Locations
San Diego, United States of America
Qualification
Master
Applicants
Be an early applicant
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