Lead SoC Performance Architect

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Als SoC Performance Architect erstellen Sie Leistungs- und Strommodelle für die Fabric NoC / DRAM-Controller / IO-Blöcke von serverklassigen SoCs, korrelieren Modelle mit dem RTL-Verhalten und helfen bei der Produktivsetzung von Leistungs-/Stromfunktionen für zukünftige SoC-Designs. Diese Position ist offen für Santa Clara, San Diego und Austin.

Responsibilities

Conduct RTL performance verification.
Develop a SoC performance/power model for blocks such as interconnect NoCs, distributed system caches, memory controllers, IO controllers.
Verify model correctness by writing unit-tests and debugging mismatches against expectations.
Identify ideas for improving the SoC’s performance/power characteristics.
Prototype idea in the performance/power model and thoroughly characterize it.
Work with architects and RTL developers to productize the improvements identified through detailed studies.

Requirements

8+ years of experience in SoC performance/power modeling
Strong grasp of the computer architecture fundamentals especially in the areas of interconnects, traffic QoS, distributed caches, coherency flows, DRAM controller and IO (PCIe) flows
Proficient in C++ and Perl / Python
Exposure to performance analysis and debug
Ability to independently identify, troubleshoot and solve performance problems
Bachelor's degree in Electrical Engineering, Computer Science, or related field and 8+ years of Systems Engineering or related work experience.
OR Master's degree in Electrical Engineering, Computer Science, or related field and 7+ years of Systems Engineering or related work experience.
OR PhD in Electrical Engineering, Computer Science, or related field and 6+ years of Systems Engineering or related work experience.
2+ years of experience in one or more system architecture technology areas and products (e.g., Power System, Shared Resource Management, Limits/Thermal Management, Hardware Islands).

Desired Qualifications

10+ years of experience in CPU / SoC performance/power modeling, Performance Validation
Proficient in IP/SoC level performance validation between RTL and performance models
Expertise in analyzing and debugging performance shortfalls in RTL environment
Exposure to testing and debugging performance issues post-silicon environments
Demonstrable experience in productizing features that improve performance/power characteristics of a design

Benefits

Competitive annual discretionary bonus program
Opportunity for annual RSU grants
Highly competitive benefits package designed to support your success at work, at home, and at play.