Layout Design Manager

Construction, Engineering & Trades · Civil & Industrial Engineering · Electrical Engineering

In short

Synopsys is seeking an experienced Layout Design Manager in Yerevan, Armenia to lead a team of custom analog/mixed-signal IC layout engineers. The role involves directing layout execution from floorplanning to tapeout, establishing advanced methodologies, and building organizational capability. This position requires a Bachelor's or Master's degree in Electrical Engineering or equivalent, with over 10 years of IC layout design experience and at least 3 years of team management experience.

Responsibilities

Lead and manage a layout engineering team delivering custom analog/mixed-signal IC layout for PCIe Gen7/Gen8, UCIe, SerDes, PLLs, PHYs, and power management IP
Direct layout execution from initial floorplanning through tapeout, including resource planning, schedule management, and risk mitigation across concurrent development programs
Establish and implement advanced layout methodologies, automation frameworks, and AI-assisted design tools to enhance quality and efficiency
Collaborate with analog design, digital implementation, verification, CAD, and product engineering organizations to resolve technical challenges and ensure alignment with project objectives
Define and enforce layout standards for DRC, LVS, EMIR, reliability, ESD, and manufacturing compliance across advanced CMOS process technologies
Build organizational capability through recruiting, mentoring, and developing layout engineers and technical leads

Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or equivalent professional experience
10+ years of professional experience in custom analog/mixed-signal IC layout design with demonstrated expertise in advanced CMOS process technologies
3+ years of experience managing and developing layout engineering teams
Proven track record delivering high-speed SerDes, PLLs, PHYs, ADC/DACs, or power management circuits through multiple production tapeouts
Comprehensive knowledge of DRC, LVS, EMIR, reliability, ESD, and design-for-manufacturing requirements
Experience with PCIe, UCIe, or other high-speed interface standards is highly valued

Desired Qualifications

Identify potential design-for-manufacturing issues during technical reviews and communicate implications and mitigation strategies
Assess when direct technical intervention is required versus coaching and resource connection
Maintain sufficient technical engagement with ongoing work to accurately assess project health and risk
Established team environments where engineers proactively communicate challenges, share lessons learned, and collaborate effectively
Provide data-supported recommendations when project timelines or scope changes introduce technical or schedule risk

Benefits

Comprehensive medical and healthcare plans
ETO and FTO Programs
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back (ESPP)
Retirement plans
Competitive salaries

Skills

SerDesPLLsPHYsPCIeUCIeEMIR analysisLVS verificationADC/DACsPower Management

#Hardware Engineering#Semiconductor#Chip Architecture#Circuit Design#Verification#IC Layout#Floorplanning#Risk Management#Technical Leadership#SerDes#High-Speed Connectivity IP#CMOS#DRC#LVS#EMIR#Reliability#ESD#PCIe#UCIe

About Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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