Digital CAD DFT Methodology, Sr Architect-19503
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Synopsys is seeking a Senior DFT Architect with extensive experience in developing and deploying test solutions for complex ASIC and SoC designs. The role involves driving advanced DFT methodologies, serving as a technical expert for Synopsys TestMAX DFT and ATPG solutions, and leading the deployment of various advanced DFT architectures. The position requires 18+ years of experience in the semiconductor or EDA industry and offers a competitive salary range.
Responsibilities
- Drive advanced DFT methodologies for complex ASIC and SoC programs across customer and internal engagements
- Serve as a senior technical expert for Synopsys TestMAX DFT, ATPG, diagnosis, and silicon lifecycle solutions
- Lead deployment of advanced DFT architectures including scan compression, hierarchical DFT, boundary scan, IEEE 1500 wrapper solutions, IJTAG infrastructures, and embedded test technologies
- Architect scalable test access and instrumentation networks using IEEE 1149.1, IEEE 1149.6, IEEE 1687, and IEEE 1500 standards
- Develop best practices for DFT insertion, ATPG generation, pattern validation, diagnosis, and coverage optimization
- Drive reusable methodologies, automation, and signoff criteria that improve deployment quality and engineering efficiency
- Partner with R&D teams to influence product capabilities and methodology improvements
- Support strategic customer engagements, methodology reviews, and complex technical escalations
- Mentor engineers and help strengthen DFT expertise across the organization
Requirements
- BS/MS in Electrical Engineering, Computer Engineering, or a related field
- 18+ years of experience in the semiconductor or EDA industry, including deep experience in DFT, ATPG, and manufacturing test methodologies
- Demonstrated expertise in architecting and implementing DFT solutions for large-scale ASIC and SoC designs
- Hands-on experience with Synopsys TestMAX DFT and TestMAX ATPG solutions
- Strong understanding of scan insertion, scan compression, hierarchical DFT, ATPG, diagnosis, coverage optimization, and test cost reduction techniques
- Expertise with standards including IEEE 1149.1, IEEE 1149.6, IEEE 1687, and IEEE 1500
- Experience developing and deploying JTAG / TAP architectures, boundary scan networks, IJTAG instrumentation networks, and embedded instrument access solutions
- Expertise integrating DFT IP including embedded compression, OCC, LBIST, TAP controllers, JTAG / IJTAG infrastructure, TDR networks, and IEEE 1500 wrappers
- Strong understanding of RTL-to-GDSII implementation flows and the interaction between DFT, synthesis, physical design, timing closure, and signoff
- Proficiency in Tcl, Python, Perl, Shell, or similar scripting languages for methodology development and automation
Desired Qualifications
- A strategic and trusted technical leader capable of influencing engineering direction across organizations and supporting our customers, partners and internal stakeholders.
- An exceptional communicator who can present complex technical concepts to diverse audiences.
- A mentor and innovator; someone who develops talent and always seeking opportunities to improve methodologies, tools and customer outcomes
- Results-driven, highly collaborative, and passionate about solving the industry's most challenging DFT problems.
Benefits
- In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses.
- Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package.
- Comprehensive medical and healthcare plans that work for you and your family.
- In addition to company holidays, we have ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
- Save for your future with our retirement plans that vary by region and country.
Skills
AIMachine LearningGenAICloudScan CompressionHierarchical DFTBoundary ScanIEEE 1500IJTAGEmbedded TestIEEE 1149.1IEEE 1149.6IEEE 1687JTAGTAPRTLGDSIISynthesisPhysical DesignTiming ClosureTclPythonPerlShell
#EDA#chip design#verification#manufacturing#ASIC#SoC#DFT#ATPG#TestMAX#semiconductor#AI#automotive#networking#high-performance computing
About Synopsys Inc
Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…
Company
Synopsys IncJob Posted
1 day ago
Employment Type
Full Time
Work mode
On Site
Salary
US$239,200–358,800 / year
Experience Level
Senior
Locations
Sunnyvale, United States
United States
United States
United States
Qualification
Bachelor, Master
Applicants
Be an early applicant
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