DFT Engineer, Principal

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

As a Principal DFT Engineer at Qualcomm Canada ULC in Toronto, Ontario, you will be responsible for developing, maintaining, and supporting DFT methodologies and flows across various company projects. This role involves architecting RTL-centric DFT environments, automating advanced features, and developing comprehensive verification solutions for complex SoC designs.

Responsibilities

  • Act as a member of Qualcomm's central DFT methodology group responsible for developing, maintaining, and supporting flows across all company business units and projects.
  • Architect methodologies and flows for an integrated, RTL centric "shift left" DFT environment across company IPs, ASICs and SoC designs.
  • Write and automate RTL for advanced DFT and DFD features not currently supported by the EDA vendors.
  • Develop automated verification test bench and sequence creation for DFT IP.
  • Architect end-to-end verification solutions from static design checks, through formal and sequence-based verification.
  • Build IP/block and SoC level scan insertion flows and scripting ATPG retargeting procedures.
  • Create automated QoR checks for implementation quality control.
  • Write static timing constraints, create waivers and devise flows for bullet proof timing checks.

Requirements

  • Bachelor's degree in engineering science, Electrical and Computer Engineering or Computer Science.
  • 10+ years of experience in complex SoC designs in RTL, DFT or FE capacity.
  • Vast experience with various DFT EDA tools from Siemens, SNPS and Cadence.
  • Good knowledge and understanding in Verilog/VHDL and SystemVerilog.
  • Exposure to CAD and automation.
  • Good exposure for using de-Perl techniques in creating generic codes.
  • Extensively experienced with main DFT standards such as JTAG (1149.1/1149.6/1500), iJTAG (1687) and BIST techniques (memory BIST, logic BIST, interconnect BISTs).
  • Experience in SoC and IP/Block level scan insertion and ATPG, simulation of zero delay and SDF annotated test sequences.

Desired Qualifications

  • Knowledge of TCL and Python is a plus.
  • Track record in integrating custom made DFT logic for complex SoCs (System-On-Chip) and CoWoS (Chip-On-Wafer-On-Substrate) designs is highly desirable.

Benefits

  • Qualcomm is an equal opportunity employer.
  • Qualcomm is committed to providing an accessible process for individuals with disabilities.
  • Qualcomm is committed to making our workplace accessible for individuals with disabilities.
#DFT#Hardware Engineering#SoC#ASIC#RTL#EDA
Qualcomm Logo

Company

Qualcomm

Job Posted

3 weeks ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Toronto, Canada

Qualification

Bachelor, Master, Doctoral

Applicants

Be an early applicant