Design Verification Lead – Peripheral IP

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Qualcomm is seeking a Design Verification Lead for its Peripheral IP organization to drive the verification of next-generation wired/wireless subsystems for Snapdragon platforms. This role involves defining verification strategies, developing UVM-based environments, and leading a small team of engineers to ensure first-time-right silicon.

Responsibilities

  • Define verification strategy, test plan, and coverage goals for complex peripheral IP and subsystem blocks.
  • Architect, develop, and maintain UVM-based constrained-random verification environments.
  • Lead day-to-day activities of a small DV team: task planning, code and testplan reviews, mentoring, and technical guidance.
  • Drive debug of complex issues across RTL, testbench, and system level, working closely with design, emulation, and validation teams.
  • Analyze and close functional and code coverage, driving quality metrics to tape-out criteria.
  • Contribute to methodology and flow improvements across the Peripheral DV team.

Requirements

  • BSc/MSc in Electrical/Computer Engineering or related field.
  • At least 7 years of hands-on verification experience using UVM and SystemVerilog.
  • Strong background in digital design and SoC/IP architecture.
  • Proven technical leadership experience.
  • Prior experience leading or mentoring engineers or demonstrated ability and motivation to lead a small DV team.
  • High technical proficiency in UVM testbench architecture (agents, sequences, scoreboards, coverage).
  • Expertise in constrained-random, coverage-driven verification.
  • Experience debugging complex failures in large-scale regressions.
  • Proficiency in scripting (Python/Perl/Tcl/shell) in a UNIX/Linux environment.

Desired Qualifications

  • Experience with high-speed peripherals (e.g., USB, PCIe, Display, SerDes, or similar I/O IP).
  • Knowledge of low-power, reset, and clock-domain interactions at IP/SoC level.
  • Familiarity with regression management, metrics, and sign-off criteria.
  • Experience working with global, cross-site teams.

Benefits

  • Opportunity to own verification of cutting-edge peripheral IP used in high-volume products.
  • A strong technical environment with the ability to lead, influence, and mentor.
  • Collaboration with world-class design, architecture, CAD, and validation teams.
  • Growth path toward broader technical or managerial leadership within Qualcomm.

Skills

UVMSystemVerilogPythonPerlTclshell scriptingUSBPCIeDisplayPortSerDes
#Design Verification#Peripheral IP#ASICS Engineering#UVM#SystemVerilog#Technical Leadership#Python#Perl#Tcl#shell scripting#UNIX#Linux#high-speed peripherals#USB#PCIe#Display#SerDes#low-power#reset#clock-domain#regression management#sign-off criteria#cross-site teams
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About Qualcomm

Enabling a world where everyone and everything can be intelligently connected.

Enabling a world where everyone and everything can be intelligently connected.\n\n

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Company

Qualcomm

Job Posted

5 days ago

Employment Type

Full Time

Work mode

On Site

Experience Level

Senior

Locations

Haifa, Israel

Qualification

Bachelor, Master

Applicants

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