CPU Server Physical Design Clock Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
As a Physical Design Clock Engineer at Qualcomm, you will collaborate with microarchitecture, RTL, CAD, and physical design teams to develop cutting-edge clocking solutions for next-generation CPUs. Responsibilities include implementing and validating CPU clocking, driving clock methodology, and optimizing skew and power.
Responsibilities
- Work with design teams to understand, implement and validate CPU clocking.
- Drive overall clock generation and distribution methodology of CPU.
- Work with CAD & block level designers to implement the clocking techniques for optimizing skew and power.
- Perform jitter analysis and measurements and provide feedback to block level and top level physical design engineers on key fixes required.
Requirements
- Experience in all aspects of construction and analysis of low skew and low power clock generation and distribution.
- Experience in clock H-tree, mesh, spines and CTS implementations.
- Good understanding of device physics, RC delay and electrical aspects.
- Proficiency in SPICE simulation and analysis for circuit design and verification.
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
- PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Desired Qualifications
- MS in Electrical Engineering; 8+ years of practical experience.
- Skilled in chip physical design, standard cell optimizations, and clock construction.
- Defined clock methodology across various designs.
- Preferred experience in deep submicron process technology nodes.
- Proficient in PLL specifications, clock skew estimation, and jitter measurements.
- Strong communication skills for team collaboration and issue resolution.
Benefits
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants.
- Highly competitive benefits package designed to support your success at work, at home, and at play.
- Qualcomm is committed to providing an accessible process for individuals with disabilities.
Skills
SPICE simulationRC delaydevice physics
#CPU#Server#Physical Design#Clock Engineering#Electrical Engineering#Computer Engineering#Computer Science
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
4 days ago
Employment Type
Full Time
Work mode
On Site
Salary
US$155,400–233,200 / year
Experience Level
Mid-Senior
Locations
Austin, United States of America
Santa Clara, United States of America
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant
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