CPU PDN & EM/IR Sign-Off Engineer (Lead/Staff)

Technology, Data & Digital · Software & Web Development · Embedded Systems

In short

Qualcomm is seeking a Lead/Staff Engineer for CPU PDN & EM/IR Sign-Off in Bangalore. This role focuses on power integrity and electromagnetic integrity sign-off for high-performance cores, chip top-level, and block-level designs. Responsibilities include developing and validating power grid specifications, analyzing IR drops, and optimizing PDN design with cross-functional teams and EDA vendors.

Responsibilities

  • IR Signoff CPU/high performance cores
  • Signal EM & Power EM Signoff for Chip TOP level & Block level CPU/DSP and other HM’s
  • Development of PG Grid spec for different HM
  • Validating the PG Grid using Grid Resistance & Secondary PG Resistance Checks
  • Validating the IR Drops using Static IR , Dynamic IR Vless & VCD Checks for validating Die & Pkg Components of IR Drops
  • Experience in IO, Bump planning and RDL routing Strategy
  • Working with SOC and Packaging Teams on Bumps Assignments / RDL Enablement / Pkg Routing Optimizations to improve overall PDN Design
  • Partnering with EDA tool vendors and internal CAD teams to develop and enhance automation flows and methodologies for improving design efficiency

Requirements

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
  • Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
  • PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
  • Hands on experience in PDN Signoff using Redhawk / RHSC / Voltus at block level / SOC Level
  • Good understanding on Power Integrity Signoff Checks
  • Proficient in scripting languages (Tcl and Perl)
  • Familiarity with Innovus for RDL / Bump Planning/PG eco
  • Ability to communicate effectively with multiple global cross-functional teams
  • Tools : Redhawk , Redhawk_SC and basic use case of Innovus/ Fusion Compiler

Desired Qualifications

  • Good knowledge on PD would is desirable
  • Python , Perl , TCL
  • Power Planning/Floorplanning ,Physical Verification hands on experience is added advantage
  • LSF /compute optimization understanding

Benefits

  • Qualcomm is an equal opportunity employer.
  • Qualcomm is committed to providing an accessible process for individuals with disabilities.
  • Qualcomm is committed to making our workplace accessible for individuals with disabilities.
#CPU#PDN#EM/IR Sign-Off#Hardware Engineering#Chip Design#Power Integrity#RDL#Bump Planning
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Company

Qualcomm

Job Posted

4 weeks ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Bangalore, India

Qualification

Bachelor, Master, Doctoral

Applicants

Be an early applicant