ASIC Digital Design, Sr Staff Engineer - 18603
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Synopsys is looking for an experienced ASIC Digital Design Sr. Staff Engineer in Sunnyvale, California. This role involves designing and developing cutting-edge semiconductor solutions, focusing on RTL design for LPDDR PHY IP, timing closure, and power optimization. The ideal candidate will have extensive Verilog and Perl scripting experience, collaborating with cross-functional teams to deliver high-performance silicon.
Responsibilities
- Design RTL modules for LPDDR PHY IP from microarchitecture through synthesis-ready implementation.
- Optimize designs to meet timing, power, and area targets across multiple process nodes.
- Develop Perl automation for design generation and flow integration.
- Collaborate with cross-functional teams to resolve timing and power challenges.
- Contribute to design reviews and methodology development.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- 8+ years of ASIC digital design experience with RTL ownership in production silicon.
- Expert Verilog proficiency for timing-critical designs.
- Strong Perl scripting skills for design automation.
- Deep knowledge of synthesis, timing analysis, and power optimization.
Desired Qualifications
- Experience with PHY IP or high-speed interfaces is preferred.
- Understand how RTL structure affects timing and power outcomes.
- Communicate effectively across technical disciplines.
- Produce maintainable code that supports collaboration.
- Identify process improvements proactively.
- Resolve technical issues through systematic analysis.
Benefits
- Comprehensive medical and healthcare plans.
- ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
- ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
- Retirement plans.
- Competitive salaries.
- Annual bonus, equity, and other discretionary bonuses.
- Comprehensive health, wellness, and financial benefits.
#ASIC#Digital Design#Sr Staff Engineer#RTL#Timing Closure#Power Optimization#Semiconductor#IP#Verilog#Perl#Synthesis#Automation#Mobile#AI#Automotive
Company
Synopsys Inc
Job Posted
2 weeks ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Sunnyvale, United States
Qualification
Bachelor, Master
Applicants
Be an early applicant