Applications Engineering, Sr Staff Engineer - STA
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Synopsys is seeking a Sr Staff Engineer for their Static Timing Analysis (STA) team in Bengaluru, India. This customer-facing role involves solving complex timing constraints and supporting industry-leading PrimeTime signoff solutions for advanced semiconductor designs. The ideal candidate will have deep expertise in STA tools, timing constraints, and scripting.
Responsibilities
- Work with leading semiconductor companies to solve complex timing constraints related issues.
- Provide expert guidance in timing constraints end to end and work on the timing closure flow.
- Debug critical timing issues (lint, promote, demote, block2top, setup/hold, clocking, SI, variability).
- Drive adoption of PrimeTime latest technologies and signoff flows.
- Work with R&D/product teams to resolve issues and drive enhancements.
- Develop reference flows, automation scripts (Tcl/Python), and best practices.
- Deliver technical training, workshops, and demos to customers.
Requirements
- Strong hands-on expertise with Synopsys PrimeTime/TCM (or equivalent STA / Constraints tools).
- Deep understanding of timing constraints (SDC) end to end.
- Deep understanding of timing closure challenges.
- Strong debugging and problem-solving skills.
- Proficiency in Tcl scripting (Python/Perl is a plus).
- Excellent communication and customer engagement skills.
- B.Tech in Electronics and Communication Or M.Tech in VLSI/Embedded systems/Communication Systems.
- Deep hands-on expertise with Synopsys PrimeTime, TCM, or equivalent static timing analysis and constraints tools in production design environments.
- Strong command of timing constraints end to end, including SDC creation, validation, and debugging across complex hierarchical designs.
- Excellent communication skills with demonstrated ability to engage customers, explain technical tradeoffs, and drive issues to resolution.
Desired Qualifications
- Experience with RTL-based flows.
- Knowledge of Mode merge and correlation.
- Exposure to high-performance designs (CPU, GPU, AI/ML chips).
- Prior customer-facing / application engineering experience.
- Experience with RTL-based flows, mode merge, correlation, or high-performance designs like CPU, GPU, or AI/ML chips is beneficial.
Benefits
- Comprehensive range of health, wellness, and financial benefits.
- Total rewards include both monetary and non-monetary offerings.
- Talented people of every background are valued and supported to do their best work.
#STA#PrimeTime#timing constraints#timing signoff#timing ECO#semiconductor
Company
Synopsys Inc
Job Posted
1 week ago
Expires
in 2 weeks
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Bengaluru, India
Qualification
Bachelor, Master
Applicants
Be an early applicant