Analog Design, Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Synopsys is looking for an Analog Design Engineer to design and develop analog building blocks for SERDES, DDR, and memory IP. The role requires a Bachelor's or Master's in Electrical Engineering with hands-on experience in analog circuit design, proficiency in CAD tools, and a solid understanding of design for reliability and layout effects.
Responsibilities
- Design and develop analog building blocks for SERDES, DDR, and memory IP, including PLLs, bandgaps, regulators, comparators, and bias circuits.
- Run simulations across process, voltage, and temperature corners to verify performance, reliability, and margin against spec.
- Identify and refine circuit topologies to hit power, area, and performance targets without compromising robustness.
- Work directly with layout engineers to ensure designs account for matching, proximity effects, electromigration, IR drop, and aging.
- Conduct design reviews with senior engineers and product teams, defending choices and incorporating feedback.
- Contribute to design methodology improvements, such as updating simulation flows, refining checklists, or documenting lessons learned from previous tapeouts.
Requirements
- Bachelor's or Master's in Electrical Engineering or related field with a strong foundation in analog circuit design.
- Hands-on experience designing analog circuits for SERDES, DDR, memory, or similar high-speed or mixed-signal applications.
- Proficiency with industry-standard CAD tools for schematic capture, simulation, and corner analysis, tools like Cadence Virtuoso, HSPICE, or Spectre.
- Solid understanding of design for reliability including electromigration, IR drop, aging effects, and how they constrain circuit choices.
- Knowledge of layout effects such as matching requirements, proximity effects, and parasitic extraction, with experience collaborating closely with layout engineers or doing layout yourself.
Desired Qualifications
- Experience with FinFET or Gate-All-Around process technologies is a plus.
- Strong problem-solving skills and the ability to debug circuits that don't behave as expected, whether that's a simulation issue, a layout problem, or a fundamental design flaw.
- Ability to explain why a particular circuit topology is the right choice for a given spec in two sentences and defend that choice in a design review.
- Ability to manage multiple design tasks at once without losing track of corner cases, margin checks, or documentation.
- Proactive in determining necessary simulations and adjustments based on failure modes.
- Treats layout engineers as design partners.
- Comfortable working independently but knows when to ask for help or escalate a risk.
- Stays current with new process nodes, design techniques, and reliability challenges.
Benefits
- Comprehensive medical and healthcare plans that work for you and your family.
- In addition to company holidays, ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
- Save for your future with retirement plans that vary by region and country.
- Competitive salaries.
#semiconductor#analog design#circuit design#verification#SERDES#DDR#memory IP
Company
Synopsys Inc
Job Posted
1 month ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Mid-Senior
Locations
Mississauga, Canada
Qualification
Bachelor, Master
Applicants
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