Staff Analog Design Engineer
In short
Synopsys is looking for an experienced Staff Analog Design Engineer to develop and validate IBIS and timing models for high-speed memory interface IP products. This on-site role in Yerevan, Armenia requires expertise in analog design, characterization, and modeling for interfaces like DDR5, LPDDR5, HBM3, and UCIe, enabling customers to integrate Synopsys IP into their SoCs.
Responsibilities
- Generate and validate IBIS models for DDRn, LPDDRn, HBM, and UCIe memory interface IP products, ensuring compliance with industry standards
- Develop timing characterization data and customer-facing timing collateral for board-level design and signal integrity analysis
- Extract behavioral models from transistor-level simulations and correlate them against silicon characterization results across PVT corners
- Work with analog design teams to capture circuit behavior and ensure models reflect real silicon performance
- Debug model discrepancies, timing violations, and signal integrity issues reported by customers or internal validation teams
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or related field
- 5+ years of hands-on experience in analog/mixed-signal design, characterization, or modeling for high-speed interfaces
- Strong understanding of IBIS modeling standards and timing model formats used in memory interface design
- Direct experience with DDR, LPDDR, HBM, or other high-speed memory interface protocols and signaling
- Proficiency with SPICE simulation tools such as HSPICE or Spectre for transistor-level characterization and model extraction
- Experience with scripting languages like Python, Perl, or Tcl for automation is a strong plus
Desired Qualifications
- Ability to look at a timing violation or an IBIS model mismatch and quickly narrow down whether it is a corner case issue, an extraction problem, or a real circuit behavior
- Ability to communicate model assumptions and limitations clearly to both design teams and customers without burying important details in jargon
- Works well with cross-functional teams including circuit designers, layout engineers, and applications engineers
- Takes ownership of deliverables from initial extraction to final customer release
Benefits
- Competitive salaries
- Comprehensive medical and healthcare plans
- Time Away (ETO and FTO Programs)
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- ESPP (Purchase Synopsys common stock at a 15% discount)
- Retirement Plans
#Analog Design#Semiconductor#Memory Interface#IBIS Models#Timing Models
Company
Synopsys Inc
Job Posted
3 weeks ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Yerevan, Armenia
Qualification
Bachelor, Master
Applicants
Be an early applicant