Senior SoC/RTL Design Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm is looking for a Senior SoC/RTL Design Engineer to independently handle the digital architecture, Verilog RTL coding, implementation, and verification of next-generation ASICs for various markets. This role involves designing complex ASICs from specification to product delivery, including high-speed digital and mixed-signal board design, and collaborating with cross-functional teams.
Responsibilities
- Independently plan and perform digital architecture, Verilog RTL coding, implementation, and verification of next generation wireless and wired ASICs.
- Design, verify, and deliver complex ASICs from functional specification to the final product.
- Investigate solutions for concept designs and evaluate architecture proposals.
- Responsible for high-speed digital and mixed-signal board design; including requirements gathering, schematic capture, component placement, layout review, production, verification and trouble-shooting.
- Perform component evaluation, circuit optimization, and unit level testing of mobile phone and other wireless designs in an engineering environment.
- Test and debug of test platform hardware and digital circuit component level and RF debugging.
- Support design engineers with the set-up and execution of complex tests and component evaluation related to base band designs.
- Perform circuit level debug, and provide feedback and assistance to design engineers by compiling test data into reports and presentations.
- Work closely and interact with cross-functional teams to plan and execute verification and validation subsystems for integration into SoCs (System on Chip) for mobile applications.
- Design hardware that meets the performance and power goals and adheres to the interface requirements while maintaining a scalable, reusable design that can be easily verified.
- Act as a strong contributor at design reviews and project meetings.
Requirements
- Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field.
- Experience in digital architecture, Verilog RTL coding, implementation, and verification of ASICs.
- Experience with high-speed digital and mixed-signal board design.
- Experience with component evaluation, circuit optimization, and unit level testing.
- Experience with test and debug of test platform hardware and digital circuit component level and RF debugging.
- Experience supporting design engineers with complex tests and component evaluation.
- Experience compiling test data into reports and presentations.
- Experience working with cross-functional teams for verification and validation subsystems.
- Ability to design hardware meeting performance, power, and interface requirements.
- Ability to maintain a scalable, reusable design that can be easily verified.
- Strong contributor at design reviews and project meetings.
Benefits
- Pay Range: $129,165.00 - 173,400.00/year
#ASIC#Digital Design#Verilog RTL#Hardware#Software#Mobile#Networking#Computing#Consumer Electronics