Senior Designer
Technology, Data & Digital · Software & Web Development · Embedded Systems · Software Engineering
In short
HCLTech is seeking a Senior Designer with 2-5 years of mandatory experience in RTL coding using Verilog/SV and design using Xilinx or Altera devices. The role requires good understanding of FPGA debugging techniques and front-end design experience. Experience in RTL Synthesis is also expected, with scripting experience being a preference.
Responsibilities
- Experience in RTL Synthesis
- Scripting experience is preferable
Requirements
- 2 to 5 years experience is mandatory
- Experience in RTL coding using Verilog/SV
- Experience in design using Xilinx or Altera devices
- Good understanding of FPGA debugging techniques
- 2 to 5 years experience in front end design
- Experience in CDC/Linting/Tool Flow
- Experience in using Vivado or Quartus
- Experience in supporting lab debug
Desired Qualifications
- Experience with ASIC/SoC development flow including synthesis/Timing Constraints development is preferred
Benefits
- At HCLTech, you'll supercharge your potential.
- You'll find your career.
- And you'll find your spark.
- All at a place that knows that helping its customers stay on top starts by putting its people first.
#FPGA#RTL#Verilog#SystemVerilog#Xilinx#Altera#Vivado#Quartus#CDC#Linting#ASIC#SoC#Synthesis
Company
HCLTech
Job Posted
2 weeks ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Bangalore, India
Applicants
Be an early applicant