Principal Digital Verification Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Synopsys is seeking a Principal Digital Verification Engineer in Nepean, Ontario. This full-time, on-site role involves developing comprehensive testplans and verification environments for complex digital designs, ensuring the quality and reliability of semiconductor solutions. The ideal candidate has extensive experience in SystemVerilog and UVM, with strong debugging and collaboration skills.
Responsibilities
- Develop comprehensive testplans and functional coverage models for training firmware running on RTL models of memory PHYs.
- Build and maintain testbench infrastructure in SystemVerilog and UVM that supports complex verification scenarios across multiple product generations.
- Create test cases that cover success paths, corner cases, and negative scenarios based on standard specifications and feature enhancements.
- Debug complex issues across firmware, RTL, and testbench layers using simulation and waveform analysis tools.
- Participate in technical reviews with architecture and implementation teams to influence design decisions from a verification perspective.
- Research and evaluate emerging technologies in virtual prototyping and emulation to improve team efficiency, throughput, and quality.
- Mentor junior engineers on testbench design, debugging techniques, and verification methodology while collaborating with other principal-level engineers on verification strategy.
Requirements
- BSc in Electrical Engineering, Computer Engineering, or related field with 12+ years of verification experience, MSc with 10+ years, or PhD with 8+ years.
- Deep proficiency in SystemVerilog and UVM, with a track record of building reusable testbench components and verification environments.
- Strong command of simulation tools, waveform debuggers, and the ability to trace issues across multiple abstraction layers.
- Solid understanding of C and experience with software/hardware co-simulation.
- Experience with assertion-based verification, coverage analysis, and protocol-oriented performance debug.
- Comfort working in Linux environments with scripting for regression systems, build automation, and source control workflows.
Desired Qualifications
- Experience with virtual prototyping or emulation platforms is a strong plus.
- Knowledge of LPDDR5/5X and LPDDR6 or other memory interface standards is a strong plus.
Benefits
- Comprehensive medical and healthcare plans that work for you and your family.
- In addition to company holidays, ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
- Save for your future with our retirement plans that vary by region and country.
- Competitive salaries.
#digital verification#semiconductor#engineering#hardware engineering#RTL#firmware#memory interface IP#UVM#SystemVerilog
Company
Synopsys Inc
Job Posted
17 hours ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Executive
Locations
Nepean, Canada
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant