Infra-Staff Design Verification Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · QA & Testing
In short
Qualcomm is seeking an experienced Infra-Staff Design Verification Engineer to develop and maintain UVM-based verification environments for high-speed interconnect protocols like PCIe, CXL, and AXI. The role involves block-level and top-level verification, collaboration with cross-functional teams, and driving verification closure.
Responsibilities
- Develop and maintain UVM-based verification environments for high-speed interconnect protocols (PCIe, CXL, AXI).
- Create and execute verification plans for high-speed interconnect protocols including PCIe, CXL, AXI, and CHI.
- Perform block-level and top-level verification, including functional coverage, assertion-based verification, and regression testing.
- Collaborate with RTL designers, architects, and validation teams to ensure design correctness and coverage closure.
- Work closely with design and architecture teams to understand specifications and derive verification strategies.
- Use third-party VIPs (e.g., Synopsys, Mentor) for protocol compliance and simulation.
- Implement and enhance scoreboards, agents, monitors, and sequences.
- Integrate and validate SMMU and Coresight components in Subsystem environments.
- Drive verification closure through coverage convergence and assertion-based verification.
- Contribute to performance, power, and cost optimization considerations during verification.
- Mentor junior engineers and contribute to verification methodology improvements.
- Debug failures at RTL and gate-level simulations.
Requirements
- Strong proficiency in System Verilog, UVM, and verification methodologies.
- Deep understanding of PCIe Gen3/Gen4/Gen5/Gen6, CXL 1.1/2.0/3.0, AXI/CHI protocols, and SMMU/Coresight architecture.
- Familiarity with Synopsys/Mentor VIPs for PCIe/CXL and AMBA protocols.
- Expertise in assertion-based verification (SVA) and coverage-driven testing.
- Proficiency in Perl/Python/Tcl scripting for automation.
- Knowledge of power-aware verification (UPF), formal verification, and performance/power optimization.
- Experience with coverage-driven verification and random constraint-based testing.
- Experience with scripting languages like Python, Perl, or Tcl.
Desired Qualifications
- Bachelor’s/Master’s/Ph.D. in Electrical, Electronics, or Computer Engineering.
- 8–12+ years of ASIC/Subsystem/SoC verification experience.
- Experience with PCIe, USB, Ethernet, or other peripheral protocols is a plus.
- Exposure to post-silicon validation and lab bring-up is desirable.
Benefits
- Qualcomm is an equal opportunity employer.
- Qualcomm is committed to providing an accessible process for individuals with disabilities.
- Qualcomm is committed to making our workplace accessible for individuals with disabilities.
#hardware engineering#verification engineer#qualcomm#bangalore#pcie#cxl#axi#systemverilog#uvm
Company
Qualcomm
Job Posted
1 month ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Bangalore, India
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant