ASIC Physical Design, Staff Engineer - 18116
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Synopsys is seeking a Staff ASIC Physical Design Engineer in Ho Chi Minh City to own the RTL-to-GDSII flow for UCIE IP on advanced process nodes. This role involves optimizing floorplanning, place and route, timing closure, and signoff, while automating flows with Tcl and Python. The ideal candidate has 5+ years of experience in advanced node physical design and strong proficiency with industry-standard tools.
Responsibilities
- Own and optimize the RTL-to-GDSII flow for UCIE IP, including floorplanning, place and route, timing closure, and signoff using PrimeTime, IC Compiler II, ICV, and RedHawk
- Integrate covercells, macros, and third-party IP blocks, ensuring clean abutment, proper power planning, and passing all QA checks
- Automate tool flows using Tcl and Python, debug complex physical design issues, and document best practices for reuse
- Collaborate with architecture, RTL, and circuit teams on test chip development, translating design intent into physical reality
- Prepare tape-out views, generate final documentation, and manage foundry design rule checklists through signoff
Requirements
- 5+ years of hands-on experience in block-level physical design, with exposure to advanced nodes such as 7nm or below
- Deep working knowledge of floorplanning, place and route, timing closure, IR-drop and electromigration analysis, and LVS/DRC signoff
- Strong proficiency with PrimeTime, IC Compiler II or Fusion Compiler, ICV, and RedHawk
- Proven experience integrating complex IP blocks and driving designs through tape-out
- Solid scripting skills in Tcl and Python for flow automation
- Experience with UCIE or die-to-die interconnect standards is a plus
Desired Qualifications
- You see a tough timing path as a challenge to solve, not a problem to escalate
- You can explain a complex power-performance tradeoff to an architect in two sentences without losing the nuance
- You automate what you can, document what you learn, and share your scripts so the whole team benefits
- You support your teammates when they are stuck and you know a successful tape-out is a group win
Benefits
- Competitive salaries
- Comprehensive medical and healthcare plans that work for you and your family
- ETO and FTO Programs for time away
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back (ESPP)
- Retirement plans that vary by region and country
#hardware#engineering#asic#physical design#staff engineer#synopsys#ucie ip#semiconductor
Company
Synopsys Inc
Job Posted
1 month ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Ho Chi Minh City, Vietnam
Applicants
Be an early applicant