The Job

Technical Architect

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

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In short

We are seeking a highly experienced Memory Layout Architect to lead the design of advanced memory solutions for integrated circuits (ICs), focusing on performance, power efficiency, and area optimization. This role involves architecting memory blocks, collaborating with cross-functional teams, and driving innovation in layout techniques for advanced technology nodes, ensuring adherence to DFM/DFY principles and overseeing physical verification.

Responsibilities

  • Lead and define the overall memory layout strategy for complex IC projects.
  • Architect and design high-performance, high-density memory blocks, including leading-edge SRAM, ROM architectures.
  • Collaborate with design, logic, verification, and architecture teams to define memory specifications and ensure seamless integration.
  • Mentor and guide junior engineers, fostering a culture of technical excellence.
  • Develop and implement innovative layout techniques for ultra-low power, high-speed memory designs for advanced technology nodes (e.g., sub-7nm FinFET, GAAFET).
  • Champion Design for Manufacturability (DFM) and Design for Yield (DFY) principles across the entire memory design flow.
  • Oversee comprehensive physical verification using industry-leading tools (DRC, LVS, Calibre) and establish robust verification methodologies.
  • Drive automation efforts through scripting (PERL, Shell, TCL, Skill) to optimize layout tasks and improve design efficiency.

Requirements

  • Master's degree in Electrical Engineering, Computer Engineering, or a related field (preferred).
  • Proven track record of successfully designing and implementing high-performance memory solutions.
  • Deep understanding of memory architectures, sub-blocks, functionalities, and emerging memory technologies.
  • Expertise in memory layout tools like Cadence Virtuoso, Calibre, Assura, and familiarity with advanced place and route techniques.
  • Extensive experience with low-power, high-performance memory design across multiple technology nodes.
  • In-depth knowledge of DFM and DFY principles with a proven ability to implement them effectively.
  • Exceptional leadership, communication, and teamwork skills.
  • Ability to manage and mentor junior engineers.
  • Strong analytical and problem-solving skills.

Benefits

  • Supercharge your potential at HCLTech.
  • Find your career and your spark.
  • A place that knows that helping its customers stay on top starts by putting its people first.
  • HCLTech is a global technology company, home to more than 223,000 people across 60 countries.
  • Delivering industry-leading capabilities centered around digital, engineering, cloud and AI.
  • Powered by a broad portfolio of technology services and products.
  • Work with clients across all major verticals.
  • Consolidated revenues as of 12 months ending June 2026 totaled $14.8 billion.
#memory layout#IC design#SRAM#ROM#DFM#DFY#physical verification#scripting
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Company

HCLTech

Job Posted

2 weeks ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Bengaluru, India

Qualification

Master

Applicants

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