Sr Staff Engineer, Physical Design
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Synopsys is seeking a Sr Staff Engineer with 8+ years of experience in Physical Implementation Flow to join their team in Bengaluru, India. This role focuses on optimizing and developing Next Gen PCI/CXL/IDE Controller IPs, with a strong emphasis on Timing Closure and defining signoff criteria for cutting-edge technology nodes.
Responsibilities
- Working on new processes for physical implementation flows and cutting-edge technology nodes.
- Collaborating with functional teams to optimize and develop Next Gen PCI/CXL/IDE Controller IPs.
- Defining signoff criteria with a strong focus on Timing Closure.
- Maturing the physical implementation guide used for customers and internal hardening teams.
- Participating in next-generation physical design methodology and flow development.
- Performing physical design implementation, including synthesis, floor planning, PG Grid design, PnR, CTS, STA, and power/signal integrity signoff.
- Evaluating PPA targets (Area/Speed/Power) and collaborating with the design team to improve design and constraints.
Requirements
- Extensive experience with ASIC design flow and hierarchical physical design strategies.
- Strong background in timing analysis, constraints management, and frontend synthesis.
- Experience with physical-aware synthesis, formality, and various verification strategies.
- Knowledge of Primepower-based power analysis and clock gating for power reduction.
- Fair knowledge of FC design planning methodologies, floor planning, and PG Grid creation using Synopsys Tools.
- Strong physical implementation flow debugging skills and scripting abilities.
Desired Qualifications
- Passionate about working on the latest processes for physical implementation flows and cutting-edge technology nodes.
- Thrive in dynamic environments and excel in collaborating with functional teams.
- Strong focus on Timing Closure and adept at defining signoff criteria.
- Possess a strong knowledge of sub-micron technology issues.
- Excellent scripting skills.
- Innovative, self-motivated, and able to work both independently and as part of a team.
- Outstanding communication skills, both verbal and written.
- Desire to understand RTL/Timing signoff criteria.
Benefits
- Competitive salaries.
- Comprehensive medical and healthcare plans.
- ETO and FTO Programs for time away.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
- ESPP with a 15% discount on Synopsys common stock.
- Retirement Plans.
- Opportunities for professional development and learning.
#ASIC#Physical Design#Timing Closure#Semiconductor
Company
Synopsys Inc
Job Posted
1 day ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Bengaluru, India
Applicants
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