SOC Platform Architect
Construction, Engineering & Trades · Civil & Industrial Engineering · Mechanical Engineering
In short
Qualcomm is looking for an SOC Platform Architect to define and design Platform infrastructure HW components like Interconnect, System Cache, Memory controllers, and System MMU for next-generation SoCs with ARM Architecture enabled. The role requires a strong background in ASIC design and computer architecture, understanding of HW-SW trade-offs, and the complete silicon HW end-to-end design flow.
Responsibilities
- Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power products.
- Work with HW architect to gather and define deployment spec/strategy for the next generation of SOC Infra HW IPs with ARM Architecture enabled and beyond.
- Co-ordinate with domain leads to ensure a robust infrastructure deployment plan based on product requirements.
- Understand HW architecture, HW-SW feature trade-off, and the complete silicon HW end-to-end design flow.
Requirements
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, or related work experience.
- OR Master's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, or related work experience.
- Robust understanding of computer architecture.
- Basic understanding of end-end ASIC design flows.
- Knowledge in SOC and Infrastructure IP (NOC, SMMU, Caches) HW architecture.
- Exposure to some form of interconnect protocol.
- Exposure to programming language for automation.
- Ability to quickly react and adapt to changes.
- Excellent communication skills.
Desired Qualifications
- Exposure to Quality of Service, Clocks, Power management, Security and Debug architectures and their respective software interfaces.
- Good knowledge in industry standard Interconnect Protocol and IO Devices Protocol.
- Understanding of HW-SW interfaces and firmware.
- Experience in post-silicon flows and debugs.
Benefits
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants.
- Highly competitive benefits package designed to support your success at work, at home, and at play.
#SOC#Platform Architecture#ASIC Design#Computer Architecture#Infrastructure IP#Interconnect#NOC#System Cache#Memory Controllers#System MMU#ARM Architecture#HW-SW Trade-off#Silicon Design Flow#Quality of Service#Power Management#Security Architectures#Debug Architectures