Principal SI/PI Engineer - 18619
Construction, Engineering & Trades · Civil & Industrial Engineering · Electrical Engineering
In short
Synopsys is seeking a Principal SI/PI Engineer in Mississauga, Ontario, Canada. This role involves leading end-to-end Signal and Power Integrity (SI/PI) for high-speed interfaces like SerDes, driving channel modeling, and ensuring robust SI signoff. The ideal candidate has 12+ years of relevant experience and expertise in simulation tools and lab correlation.
Responsibilities
- Lead end-to-end SIPI for high-speed interfaces including PCI Express (Gen6/7/8), E224G, E448G, CXL (over PCIe), and other SerDes interfaces, spanning on-die, interposer, package, PCB, connectors, and compliance fixtures.
- Drive channel modeling and correlation across time- and frequency-domain analysis: S-parameters, TDR, crosstalk, ICN/ccICN, ERL/dERL, jitter/noise budgeting, equalization tradeoffs (TX/RX FFE/DFE/CTLE), eye margin simulation, and link margining.
- Own and execute SI signoff methodology for SerDes channels, including test chip package/board SIPI model extraction/model quality checks, de-embedding, and ensuring models are bandwidth-appropriate for target data rates.
- Partner with circuit/PHY, interposer/package, board, and product teams to diagnose bring-up and lab issues; propose design fixes and quantify risk/benefit via simulation and measurement.
- Plan and run correlation experiments (bench characterization, compliance testing support, fixture design guidance) and document learnings as reusable design guidelines.
- Define, improve, and document SIPI flows, requirements, and checklists for internal teams and (where applicable) customers; mentor engineers and lead technical reviews.
- Provide technical leadership across programs: set priorities, identify cross-project reuse opportunities, and influence architecture choices impacting signal integrity and power integrity.
Requirements
- B.S. (M.S./Ph.D. preferred) in Electrical/Electronic Engineering or related field.
- 12+ years of relevant experience in high-speed SI/PI for SerDes links (silicon + package + board), preferably in interface IP or high-volume product development.
- Strong fundamentals in EM, transmission lines, passive/active modeling, and statistical link analysis; comfortable translating system requirements into measurable/signoff criteria.
- Expertise with high-speed link concepts: insertion/return loss, impedance control, mode conversion, NEXT/FEXT, jitter/noise sources, equalization, BER, etc.
- Deep expertise with modeling, simulation and EM tools (HSPICE, Keysight ADS/SystemVue, Ansys HFSS/SIwave/AEDT, Cadence Sigrity, Mathworks SIMULINK) and model formats (Touchstone, IBIS-AMI, SPICE, EM-based RLGC).
- Experience with lab correlation and measurement techniques (TDR, VNA, eye/jitter measurements, de-embedding/fixture calibration) and working alongside validation/compliance teams.
- Proficiency in scripting/automation for flow enablement (Python preferred; MATLAB/TCL is a plus) and a disciplined approach to documentation and reproducibility.
- Demonstrated technical leadership: mentoring, design reviews, influencing cross-functional decisions, and communicating complex topics clearly to mixed audiences.
Desired Qualifications
- Analytical and detail-oriented, with a passion for tackling complex engineering challenges.
- Collaborative and communicative, able to work effectively across multi-disciplinary teams.
- Proactive and resourceful, constantly seeking opportunities to optimize processes and drive innovation.
- Mentor and leader, committed to sharing knowledge and empowering others.
- Disciplined and organized, with a strong focus on documentation, reproducibility, and best practices.
- Adaptable, able to thrive in fast-paced, dynamic environments.
Benefits
- Comprehensive medical and healthcare plans that work for you and your family.
- In addition to company holidays, we have ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
- Save for your future with our retirement plans that vary by region and country.
- Competitive salaries.
#Engineering#High-Speed Interfaces#SerDes#Signal Integrity#Power Integrity#EDA#Chip Design#Verification#IP Integration#EM Theory#Transmission Lines#Modeling#Simulation#Measurement Tools#Bench Characterization#Compliance Testing#Fixture Design#Technical Leadership#Documentation#Automation#Electrical Engineering#Electronic Engineering