Layout Design, Sr Staff Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems · QA & Testing
In short
Synopsys is looking for a Sr Staff Engineer with over 10 years of experience in memory layout design, specifically for advanced nodes like 5nm and below. The role involves leading complete physical layout development for various memory IPs, defining methodologies, resolving complex issues, and mentoring other engineers.
Responsibilities
- Lead complete physical layout development for advanced memory IP including SRAM, ROM, eDRAM, and emerging memory types across nodes from 3nm to mature technologies
- Drive layout architecture decisions at every level: bit-cell topology, array organization, peripheral circuits, power distribution, and full memory integration
- Define and implement layout methodologies that improve area efficiency, performance, power consumption, and manufacturability while meeting aggressive yield targets
- Resolve complex DRC, LVS, ERC, and EMIR issues in dense memory structures, ensuring first-pass silicon success and working directly with foundry teams when rules or models need clarification
- Lead RC extraction, parasitic analysis, and signal integrity optimization efforts, collaborating with circuit designers to close timing, power, and reliability on critical paths
- Develop layout automation, generators, validation flows, and productivity tools using scripting languages to accelerate execution and improve design quality
- Mentor staff and senior layout engineers across multiple projects and sites, providing technical guidance, reviewing critical design decisions, and supporting career development
Requirements
- Bachelor's or Master's degree in Electronics Engineering, Telecommunication, Physics, or related technical discipline
- Typically 10+ years of hands-on experience in custom physical layout design with deep expertise in advanced memory IP development
- Demonstrated success delivering memory IP across multiple advanced technology nodes and tapeouts, including SRAM, ROM, or eDRAM in production silicon
- Deep expertise in memory layout including bit-cell design, array structures, sense amplifiers, decoders, redundancy circuits, I/O, and peripheral blocks
- Strong proficiency with layout tools such as Synopsys Custom Compiler, Cadence Virtuoso, or equivalent custom design platforms
- Advanced understanding of foundry design rules, DRC/LVS closure methodologies, reliability requirements, EMIR validation, and memory-specific constraints
- Experience developing layout automation, scripting solutions, or methodology improvements that enhance productivity and quality is highly valued
Desired Qualifications
- You solve the layout problems that others escalate, the ones involving conflicting constraints, ambiguous rules, or tradeoffs that require deep technical judgment
- You can sit in a design review with circuit designers and foundry engineers, absorb conflicting requirements, and walk out with a layout strategy that actually works for everyone
- You build trust across teams by being direct about what is possible, what is risky, and what needs to change, and you do it without creating unnecessary friction
- You mentor by showing engineers how to think through a problem systematically, how to prioritize when everything feels critical, and how to build layouts that survive the full product lifecycle
- You stay organized across multiple projects, shifting priorities, and cross-site collaboration without losing sight of what matters most: delivering silicon that works
- You care about the details, the spacing that affects yield, the symmetry that affects matching, the routing that affects performance, because you know those details define whether the product succeeds
Benefits
- Comprehensive medical and healthcare plans
- ETO and FTO Programs (Time Away)
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
- Retirement Plans (vary by region and country)
- Competitive salaries
#AI#HPC#automotive#mobile#cloud#memory IP#semiconductor
Company
Synopsys Inc
Job Posted
1 month ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Noida, India
Qualification
Bachelor, Master
Applicants
Be an early applicant