High Speed IP PHY Applications Principal Engineer / Manager
Construction, Engineering & Trades · Civil & Industrial Engineering · Electrical Engineering
In short
Synopsys seeks a Principal Engineer/Manager in Yongin-si, South Korea, to support customers integrating high-speed IP PHYs, focusing on USB. Responsibilities include troubleshooting, guiding integration, and collaborating with R&D. Requires a Bachelor's/Master's in EE/CE with 10-20+ years of ASIC experience and strong communication skills in Korean and English.
Responsibilities
- Provide technical support to customers integrating DesignWare USB Mixed Signal PHY IP.
- Troubleshoot customer issues across synthesis, static timing analysis, design-for-test, and clock domain crossing.
- Guide customers through USB 2.0, USB 3.x, and Type-C implementation considerations.
- Collaborate with Korea AE, R&D, and product teams to escalate complex issues.
- Contribute to customer support for other high-speed interface PHY IP (e.g., MIPI, PCIe, HDMI).
- Deliver technical presentations and integration best practices.
- Travel occasionally to customer sites.
Requirements
- Bachelor's or Master's in Electrical Engineering or Computer Engineering.
- 10 to 20+ years of ASIC design, verification, or SoC integration experience.
- Strong working knowledge of synthesis, static timing analysis, design-for-test, and clock domain crossing.
- Ability to work independently and drive customer-driven issues to resolution.
- Excellent communication skills in Korean and English.
- Willingness to travel occasionally.
Desired Qualifications
- USB 2.0, USB 3.x, Type-C, or USB PHY integration experience is a strong plus.
- Broader high-speed interface background (e.g., MIPI, PCIe, HDMI) is a plus.
Benefits
- Enable customer success on high-stakes tapeouts.
- Reduce time-to-silicon for customers.
- Build deep technical relationships with leading semiconductor companies.
- Shape future IP releases by channeling customer feedback.
- Expand Synopsys footprint in customer accounts.
#Engineering#ASIC#IP Integration#Technical Support#Silicon Bring-up#USB#PHY IP