ASIC Physical Design, Sr Manager
Technology, Data & Digital · Software & Web Development · Embedded Systems
In short
Synopsys is seeking a Senior Manager for ASIC Physical Design in Hyderabad, India. This role involves leading the physical design of UCIe PHYs and testchips on advanced process nodes (5nm and below), managing a team of engineers, and collaborating with cross-functional teams to ensure PPA and schedule commitments. The ideal candidate has 13+ years of experience in ASIC physical design, proficiency in industry-standard tools, and proven leadership skills.
Responsibilities
- Lead the physical design implementation of UCIe PHYs and testchips across advanced process nodes including 5nm and below
- Own synthesis, place and route, timing closure, physical verification, DFT, and ATPG workflows using tools like DC, PT, ICC2/FC, and ICV
- Manage and mentor a team of physical design engineers, balancing technical guidance with project execution and delivery accountability
- Drive cross-functional collaboration with verification, DFT, IP integration, and customer engineering teams to meet PPA and schedule commitments
- Represent the physical design team in customer engagements, translating technical constraints into actionable solutions and managing escalations
- Champion the adoption of new flows, tools, and methodologies that improve team productivity and product quality
- Provide regular project status updates to leadership, surfacing risks early and proposing mitigation strategies
Requirements
- 13+ years of hands-on experience in ASIC physical design, with demonstrated expertise in synthesis, place and route, timing closure, and physical verification
- Multiple tapeouts and sign-offs in 5nm or more advanced process nodes
- Proficiency with industry-standard tools including DC, PT, ICC2/FC, and ICV
- Experience leading physical design teams independently, managing project timelines, and coordinating with cross-functional groups
- Proven track record working on SoC or IP tapeouts, handling multiple teams, and interfacing with customers or internal stakeholders
- Strong understanding of FinFET technology and the physical design challenges specific to advanced nodes
- Experience representing engineering in business unit or company-wide initiatives
Desired Qualifications
- Ability to diagnose and create a plan for timing failures
- Experience building, hiring, onboarding, and scaling engineering teams
- Ability to push back on customer requests that conflict with physical design realities while preserving relationships
- Skill in promoting adoption of new tools and flows by demonstrating their value
- Ability to monitor delivery quality and timelines by staying close to the work
- Comfort operating in ambiguity and helping teams navigate it
Benefits
- Comprehensive medical and healthcare plans
- ETO and FTO Programs for time away
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- ESPP - Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
- Retirement Plans
- Competitive salaries
#ASIC#Physical Design#Manager#Engineering#Hyderabad
Company
Synopsys Inc
Job Posted
1 month ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Executive
Locations
Hyderabad, India
Applicants
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