Staff Application Engineer- Physical Design
Construction, Engineering & Trades · Civil & Industrial Engineering · Mechanical Engineering
In short
Synopsys is seeking a Staff Application Engineer with deep physical design expertise to support customers using their advanced EDA tools. This role involves debugging complex issues, developing methodology recommendations, and collaborating with R&D to drive product innovation in Sunnyvale, California.
Responsibilities
- Support customer engagements on Synopsys physical design tools like Fusion Compiler and ICC2 for advanced node designs.
- Debug complex physical design issues across the RTL-to-GDS flow, including placement, CTS, routing, timing closure, and power optimization.
- Develop and deliver methodology recommendations tailored to customer design constraints and project schedules.
- Run benchmarks and proof-of-concept flows to demonstrate tool capabilities and AI-driven optimization features.
- Collaborate with R&D, product management, and field teams to translate customer pain points into product requirements.
- Present technical content to customer engineering teams and management.
- Travel to customer sites as needed for onsite support, training, and design reviews.
Requirements
- Bachelor's degree in Electrical Engineering or equivalent with 7+ years of hands-on ASIC physical design experience, or Master's degree with 5+ years.
- Deep experience with RTL-to-GDS flows using industry-standard tools, including placement, optimization, clock tree synthesis, and routing.
- Strong working knowledge of Synopsys backend tools, specifically Fusion Compiler or ICC2, with hands-on experience in timing closure, macro placement, and routing at advanced nodes.
- Proficiency with static timing analysis tools, particularly PrimeTime, including setup/hold analysis and noise analysis.
- Solid understanding of advanced node design challenges at 7nm and below, including FinFET effects, multi-patterning, and electromigration.
- Experience with logical and physical synthesis flows and AI-driven methodologies for optimization.
- Excellent communication skills with the ability to present technical concepts clearly to both engineering teams and management.
Desired Qualifications
- Ability to quickly triage timing failures and determine root causes (methodology, tool setting, or design problem).
- Comfortable context-switching between multiple customer engagements, managing priorities effectively.
- Ability to explain complex tradeoffs clearly to design leads.
- Customer-focused approach, pushing back on requests not aligned with best practices and offering alternative solutions.
- Clear documentation of work for knowledge transfer.
- Energized by teaching and helping customer engineers understand and fix flow issues.
Benefits
- Base Salary Range: $129,000 - $193,000.
- Eligible for an annual bonus, equity, and other discretionary bonuses.
- Comprehensive health, wellness, and financial benefits.
- Competitive total rewards package.
#ASIC#physical design#EDA#semiconductor