The Job

Sr. Staff/Principal Engineer - Low Power Chip Architect / System Engineer

Construction, Engineering & Trades · Civil & Industrial Engineering · Electrical Engineering

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In short

We are looking for a senior Low Power Chip Architect / System Engineer with expertise in mixed-signal IC and system design for Robotics and Industrial IoT applications. This role involves defining architecture, driving transistor-level design, and system integration of ultra-low-power ICs, leading programs from specification through silicon bring-up.

Responsibilities

  • Define and support end-to-end system architecture, partitioning across analog, digital, firmware, and system domains.
  • Drive architectural trade-offs across power, performance, noise, latency, and silicon area.
  • Partner with chip leads and system leads from concept definition through silicon bring-up and validation.
  • Lead feasibility studies and transistor-level design of mixed-signal building blocks (ADCs, DACs, PLLs/DLLs, LDOs, SerDes).
  • Architect and integrate ultra-low-power AFEs optimized for battery-operated IIoT and Robotics sensor ASICs.
  • Drive full-chip execution in collaboration with internal teams and third-party IP vendors and design houses.
  • Develop behavioral and system-level models using MATLAB/Simulink to evaluate noise, linearity, and SNR.
  • Perform comprehensive pre-silicon verification across PVT corners.
  • Support post-silicon bring-up, characterization, and reliability qualification.
  • Collaborate with packaging, test, and system teams to ensure successful productization.
  • Support multi-modal sensor data acquisition, sensor fusion, and edge AI inference workflows.
  • Contribute to hardware–software integration for efficient system-level deployment.

Requirements

  • Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.
  • OR Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.
  • OR PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

Desired Qualifications

  • Ph.D. in Electrical Engineering (or related field) with 8+ years of post-degree industrial IC/system design experience OR M.S. in Electrical Engineering (or related field) with 10–12+ years of industrial IC/system design experience
  • Strong expertise in low-power analog and mixed-signal (AMS) IC design
  • Hands-on experience with Cadence Virtuoso, AMS sims, verilog and related analog design tools
  • Proficiency with Spectre, HSPICE, and board-level simulation methodologies
  • Solid understanding of PDKs, LVS, DRC, and PEX flows
  • Proven experience with ESD and reliability standards (HBM, CDM, TLP)
  • Advanced academic background in Electrical Engineering or a closely related field
  • Extensive industry experience in mixed-signal IC and system-level design
  • Demonstrated experience as a Chip Lead, System Architect, or Technical Lead
  • Proven ability to drive end-to-end silicon programs from concept to production
  • Strong capability to work independently and provide technical direction with minimal supervision
  • Experience with digital design flows, including synthesis and timing analysis
  • Familiarity with firmware development and software integration
  • Working knowledge of embedded interfaces such as I2C, I3C, SPI, and MIPI
  • Proficiency in Python or similar scripting languages
  • Experience with deep submicron CMOS technologies and low-power fabrication processes
  • Exposure to IC packaging, board-level validation, and system bring-up
  • Background in sensor systems, sensor fusion, or edge AI applications
  • Strong technical leadership and ownership mindset
  • Excellent cross-functional communication and collaboration skills
  • Ability to mentor and guide engineers across analog, digital, layout, and system domains
  • Strong analytical and problem-solving abilities
  • Comfortable making architecture-level decisions under ambiguity
  • Effective at managing external vendors, IP providers, and design partners
  • Results-driven with a strong focus on execution and quality

Benefits

  • Competitive annual discretionary bonus program
  • Opportunity for annual RSU grants
  • Highly competitive benefits package
#Chip Architect#System Engineer#Low Power#Mixed-Signal IC Design#Robotics#IIoT#Analog Front Ends#Firmware#ASICs#Battery-Operated#Sensor ASICs#MATLAB/Simulink#Pre-silicon Verification#Silicon Bring-up#Multi-modal Sensor Data Acquisition#Sensor Fusion#Edge AI
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Company

Qualcomm

Job Posted

2 weeks ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

San Diego, United States of America

Qualification

Bachelor, Master, Doctoral

Applicants

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