The Job

Sr Staff Engineer EM/IR

Technology, Data & Digital · Software & Web Development · Embedded Systems · Software Engineering

Join for updates

In short

Qualcomm is looking for a Senior Staff Engineer in Hardware Engineering with expertise in EM/IR analysis and sign-off. This role involves owning full-chip IR drop and electromigration sign-off, developing robust methodologies using EDA tools, and collaborating with cross-functional teams. The position requires 12+ years of semiconductor industry experience and strong scripting skills in Python/TCL.

Responsibilities

  • Own full-chip and block-level static/dynamic IR drop and signal/power electromigration sign-off.
  • Own die plus interposer analysis, die plus interposer plus pkg analysis.
  • Handle vector based IR signoff and vector less signoff in different modes.
  • Drive root-cause debugging for voltage, EM violations and collaborate with physical design (PD) teams on floorplanning and power grid fixes.
  • Own power estimation and signoff on Primepower and Joules on different use cases.
  • Understand Mixed signal IP requirements and derive metrics for signoff.
  • Define and maintain robust EMIR methodologies using standard EDA tools like Ansys RedHawk-SC, or Cadence Voltus.
  • Work on enhancing flow and methods for faster convergence and covering critical gaps with changing signoff trends.
  • Support chip-package-system (CPS) integration and work alongside silicon package and interposer teams.
  • Work closely with PnR on fixes needed for EMIR violations and left shift strategy for correct by construction methods.
  • Work with DFT teams to understand impact of DFT strategy on EMIR, assess/fix impact on IR from DFT patterns, provide guidelines for toggling activity in DFT modes, provide power estimation to ATE and board testing teams.
  • Work proactively with EDA vendors to get resolution on Tool issues, track critical issues impacting project, initiate and track topics of long term and future interests.
  • Work with flow teams to integrate new methods and fixes in to the flow that are impacting ongoing projects.
  • Initiate work flows for long term and future interests.
  • Direct daily task allocation, monitor metrics, and manage project schedules to meet tapeout milestones.
  • Train junior and mid-level engineers in advanced-node power integrity challenges and scripting (TCL, Python).
  • Partner with timing (STA), physical design, package/interposer and analog/SerDes integration groups to clear design bottlenecks.
  • Communicate technical risks, execution progress, and mitigation paths to upper management on a regular basis.

Requirements

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
  • Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
  • PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
  • 12+ years of relevant semiconductor industry experience, with proven background in power integrity sign-off.
  • Advanced expertise in RedHawk_SC, Voltus, PTPX.
  • Strong scripting proficiency (Python/TCL).
  • Deep knowledge in EMIR domain.
  • Good knowledge of adjacent domains like STA and inter-operation with those domains.
  • Bachelor’s or Master’s degree in Electrical Engineering, VLSI, or a related electronics discipline.

Desired Qualifications

  • Knowledge of CPM generation on different use cases.
#Hardware Engineering#EM/IR#power integrity#static IR drop#electromigration#chip analysis#interposer analysis#pkg analysis#EDA tools#Ansys RedHawk-SC#Cadence Voltus#flow development#PnR#DFT#ATE#board testing#EDA vendors#VLSI#TCL#Python#STA#physical design#package#interposer#analog/SerDes integration
Qualcomm Logo

Company

Qualcomm

Job Posted

3 days ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Bangalore, India

Qualification

Bachelor, Master, Doctoral

Applicants

Be an early applicant