Senior Staff ASIC Digital Design Engineer (HPC IP) - 18387
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Synopsys is seeking a Senior Staff ASIC Digital Design Engineer with expertise in HPC IP. This role involves leading the design and verification of complex ASIC blocks, collaborating with cross-functional teams, and utilizing advanced EDA tools. A BSEE/MSEE with 10+ years of experience in ASIC digital design and verification, including knowledge of High-Performance Interface IP protocols, is required.
Responsibilities
- Leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.
- Collaborating closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.
- Developing and executing comprehensive test plans to verify the functionality and performance of your designs.
- Utilizing advanced EDA tools and methodologies to optimize design performance and power efficiency.
- Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement within the team.
Requirements
- BSEE/MSEE with 10 + years of experience in ASIC digital design and verification, including strong hands-on RTL design expertise.
- Proficiency in using industry-standard EDA tools and methodologies for design and verification.
- Deep understanding of High-Performance Interface IP protocols (PCI Express (PCIe), Compute Express Link (CXL), DDR Memory Interfaces, Ethernet etc.) and their implementation in ASIC designs.
- Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges.
- Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.
Desired Qualifications
- Passionate about turning complex architecture into high-performance silicon.
- Strong RTL design and verification expertise to solve challenging ASIC design problems.
- Enjoy collaborating across engineering teams to improve performance, power, quality, and integration.
- Excited to help build advanced IP that powers next-generation intelligent and connected systems used by leading semiconductor companies worldwide.
- A proactive and self-motivated individual who takes initiative and acts independently with minimal oversight.
- A strategic thinker with the ability to implement goals that have a direct impact on department results.
- A detail-oriented engineer who works meticulously to ensure the highest standards of quality and performance.
- A collaborative team player who thrives in dynamic and fast-paced environments.
- A lifelong learner who stays up-to-date with the latest industry trends and continuously seeks to improve their skills and knowledge.
Benefits
- Competitive salaries.
- Annual bonus, equity, and other discretionary bonuses may be eligible.
- Comprehensive health, wellness, and financial benefits.
- Comprehensive medical and healthcare plans.
- ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
- ESPP: Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
- Retirement Plans.
#ASIC#HPC#IP#Digital Design#Engineering
Company
Synopsys Inc
Job Posted
1 week ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Austin, United States
Qualification
Bachelor, Master
Applicants
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